bindings/pinctrl/qcom%2Csc8280xp-lpass-lpi-pinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18     const: qcom,sc8280xp-lpass-lpi-pinctrl
22       - description: LPASS LPI TLMM Control and Status registers
23       - description: LPASS LPI MCC registers
27       - description: LPASS Core voting clock
28       - description: LPASS Audio voting clock
30   clock-names:
32       - const: core
33       - const: audio
35   gpio-controller: true
37   "#gpio-cells":
39       include/dt-bindings/gpio/gpio.h
42   gpio-ranges:
46   "-state$":
48       - $ref: "#/$defs/qcom-sc8280xp-lpass-state"
49       - patternProperties:
50           "-pins$":
51             $ref: "#/$defs/qcom-sc8280xp-lpass-state"
55   qcom-sc8280xp-lpass-state:
60     $ref: /schemas/pinctrl/pincfg-node.yaml
68           pattern: "^gpio([0-9]|1[0-8])$"
82       drive-strength:
88       slew-rate:
97       bias-bus-hold: true
98       bias-pull-down: true
99       bias-pull-up: true
100       bias-disable: true
101       input-enable: true
102       output-high: true
103       output-low: true
106       - pins
107       - function
112   - $ref: pinctrl.yaml#
115   - compatible
116   - reg
117   - clocks
118   - clock-names
119   - gpio-controller
120   - "#gpio-cells"
121   - gpio-ranges
126   - |
127     #include <dt-bindings/sound/qcom,q6afe.h>
129         compatible = "qcom,sc8280xp-lpass-lpi-pinctrl";
134         clock-names = "core", "audio";
135         gpio-controller;
136         #gpio-cells = <2>;
137         gpio-ranges = <&lpi_tlmm 0 0 19>;
139         dmic01-state {
140             dmic01-clk-pins {
145             dmic01-clk-sleep-pins {
151         tx-swr-data-sleep-state {