bindings/pinctrl/qcom%2Cmdm9607-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,mdm9607-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. MDM9607 TLMM block
10   - Konrad Dybcio <konrad.dybcio@somainline.org>
13   Top Level Mode Multiplexer pin controller in Qualcomm MDM9607 SoC.
16   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20     const: qcom,mdm9607-tlmm
28   interrupt-controller: true
29   "#interrupt-cells": true
30   gpio-controller: true
31   gpio-reserved-ranges: true
32   "#gpio-cells": true
33   gpio-ranges: true
34   wakeup-parent: true
37   - compatible
38   - reg
43   "-state$":
45       - $ref: "#/$defs/qcom-mdm9607-tlmm-state"
46       - patternProperties:
48             $ref: "#/$defs/qcom-mdm9607-tlmm-state"
51   qcom-mdm9607-tlmm-state:
56     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
66             - pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
67             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
110       - pins
113   - |
114     #include <dt-bindings/interrupt-controller/arm-gic.h>
115     tlmm: pinctrl@1000000 {
116         compatible = "qcom,mdm9607-tlmm";
119         gpio-controller;
120         gpio-ranges = <&msmgpio 0 0 80>;
121         #gpio-cells = <2>;
122         interrupt-controller;
123         #interrupt-cells = <2>;