Lines Matching +full:sc8280xp +full:- +full:qmp +full:- +full:pcie +full:- +full:phy
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (UFS, SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
13 The QMP PHY controller supports physical layer functionality for a number of
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
19 - qcom,msm8996-qmp-ufs-phy
20 - qcom,msm8998-qmp-ufs-phy
21 - qcom,sa8775p-qmp-ufs-phy
22 - qcom,sc8180x-qmp-ufs-phy
23 - qcom,sc8280xp-qmp-ufs-phy
24 - qcom,sdm845-qmp-ufs-phy
25 - qcom,sm6115-qmp-ufs-phy
26 - qcom,sm6125-qmp-ufs-phy
27 - qcom,sm6350-qmp-ufs-phy
28 - qcom,sm7150-qmp-ufs-phy
29 - qcom,sm8150-qmp-ufs-phy
30 - qcom,sm8250-qmp-ufs-phy
31 - qcom,sm8350-qmp-ufs-phy
32 - qcom,sm8450-qmp-ufs-phy
33 - qcom,sm8550-qmp-ufs-phy
42 clock-names:
45 - const: ref
46 - const: ref_aux
47 - const: qref
49 power-domains:
55 reset-names:
57 - const: ufsphy
59 vdda-phy-supply: true
61 vdda-pll-supply: true
63 "#clock-cells":
66 "#phy-cells":
70 - compatible
71 - reg
72 - clocks
73 - clock-names
74 - resets
75 - reset-names
76 - vdda-phy-supply
77 - vdda-pll-supply
78 - "#phy-cells"
81 - if:
86 - qcom,sa8775p-qmp-ufs-phy
87 - qcom,sm8450-qmp-ufs-phy
92 clock-names:
95 - if:
100 - qcom,msm8998-qmp-ufs-phy
101 - qcom,sc8180x-qmp-ufs-phy
102 - qcom,sc8280xp-qmp-ufs-phy
103 - qcom,sdm845-qmp-ufs-phy
104 - qcom,sm6115-qmp-ufs-phy
105 - qcom,sm6125-qmp-ufs-phy
106 - qcom,sm6350-qmp-ufs-phy
107 - qcom,sm7150-qmp-ufs-phy
108 - qcom,sm8150-qmp-ufs-phy
109 - qcom,sm8250-qmp-ufs-phy
110 - qcom,sm8350-qmp-ufs-phy
111 - qcom,sm8550-qmp-ufs-phy
116 clock-names:
119 - if:
124 - qcom,msm8996-qmp-ufs-phy
129 clock-names:
132 - if:
137 - qcom,msm8996-qmp-ufs-phy
138 - qcom,msm8998-qmp-ufs-phy
141 power-domains:
145 - power-domains
150 - |
151 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
153 ufs_mem_phy: phy@1d87000 {
154 compatible = "qcom,sc8280xp-qmp-ufs-phy";
158 clock-names = "ref", "ref_aux";
160 power-domains = <&gcc UFS_PHY_GDSC>;
163 reset-names = "ufsphy";
165 vdda-phy-supply = <&vreg_l6b>;
166 vdda-pll-supply = <&vreg_l3b>;
168 #phy-cells = <0>;