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ab21ecef |
| 31-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes
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| #
1d12a7c8 |
| 26-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-spi
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| #
557767ed |
| 20-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-marvell
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| #
c4cb6e64 |
| 19-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-arc
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075cbae1 |
| 16-Jan-2018 |
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
ARC: HSDK: CGU: Update AXI, TUN, ARC clock options
Update default AXI, TUN, ARC clock set options:
instead of changing only IDIV divider settings adjust also domain PLL
settings.
ARC: HSDK: CGU: Update AXI, TUN, ARC clock options
Update default AXI, TUN, ARC clock set options:
instead of changing only IDIV divider settings adjust also domain PLL
settings.
Add support of TUN_ROM and TUN_PWM clocks (subclocks of TUNN_PLL)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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| #
b55c89ce |
| 19-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-spi
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| #
76cc3728 |
| 19-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi
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| #
7ef548e6 |
| 13-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
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6b308494 |
| 13-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-usb
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fd124556 |
| 13-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh
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| #
9ebc54b8 |
| 13-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-samsung
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| #
87f3dee2 |
| 11-Dec-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-uniphier
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| #
e80dac0a |
| 10-Dec-2017 |
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
ARC: clk: introduce HSDK CGU clock driver
Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.
Each clock has assi
ARC: clk: introduce HSDK CGU clock driver
Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.
Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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