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e573bdb3 |
| 30-Oct-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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446d37c1 |
| 28-Oct-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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Revision tags: v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2 |
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46d0a991 |
| 17-Aug-2015 |
Jagan Teki <jteki@openedev.com> |
spi: Add zynq qspi controller driver
Added zynq qspi controller driver for Xilinx Zynq APSOC, this driver is driver-model driven with devicetree support.
=> sf probe SF: Detected S25FL128S_64K with
spi: Add zynq qspi controller driver
Added zynq qspi controller driver for Xilinx Zynq APSOC, this driver is driver-model driven with devicetree support.
=> sf probe SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB => mw.b 0x100 0xCC 0x1000000 => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s => sf read 0x3000000 0x0 0x1000000 device 0 whole chip SF: 16777216 bytes @ 0x0 Read: OK => cmp.b 0x3000000 0x100 0x1000000 Total of 16777216 byte(s) were the same
Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com>
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c9feb427 |
| 03-Sep-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
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1b2fd5bf |
| 01-Sep-2015 |
Simon Glass <sjg@chromium.org> |
rockchip: Add SPI driver
Add a SPI driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2015.10-rc1, v2015.07 |
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1254ff97 |
| 10-Jul-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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891b4870 |
| 01-Jul-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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Revision tags: v2015.07-rc3 |
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13600042 |
| 27-Jun-2015 |
Jagan Teki <jteki@openedev.com> |
spi: Makefile: Use object file alphabetic order
Use object files as incresing alphabetic order, so-that it's easy for readability.
Signed-off-by: Jagan Teki <jteki@openedev.com>
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f23d532b |
| 26-Jun-2015 |
Jagan Teki <jteki@openedev.com> |
spi: Zap oc_tiny_spi driver
Zap oc_tiny_spi driver since the boards used this driver is no longer been active.
Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Thomas Chou <thomas@wytron.com.tw>
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4d934a9f |
| 26-Jun-2015 |
Jagan Teki <jteki@openedev.com> |
spi: Zap ftssp010_spi driver
Zap ftssp010_spi driver since the boards used this driver is no longer been active.
Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Kuo-Jung Su <dantesu@faraday-tech
spi: Zap ftssp010_spi driver
Zap ftssp010_spi driver since the boards used this driver is no longer been active.
Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Axel Lin <axel.lin@ingics.com>
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4ad479e3 |
| 26-Jun-2015 |
Jagan Teki <jteki@openedev.com> |
spi: Zap andes_spi driver
Zap andes_spi driver since the boards used this driver is no longer been active.
Signed-off-by: Jagan Teki <jteki@openedev.com> Cc: Macpaul Lin <macpaul@andestech.com>
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Revision tags: v2015.07-rc2, v2015.07-rc1 |
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b939689c |
| 05-May-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
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Revision tags: v2015.04, v2015.04-rc5 |
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a8919371 |
| 24-Mar-2015 |
Haikun.Wang@freescale.com <Haikun.Wang@freescale.com> |
dm: spi: Convert Freescale DSPI driver to driver model
Move the Freescale DSPI driver over to driver model.
Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromiu
dm: spi: Convert Freescale DSPI driver to driver model
Move the Freescale DSPI driver over to driver model.
Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
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59064346 |
| 10-Apr-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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981219ee |
| 31-Mar-2015 |
Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> |
lpc32xx: add LPC32xx SSP support (SPI mode)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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Revision tags: v2015.04-rc4, v2015.04-rc3, v2015.04-rc2, v2015.04-rc1, v2015.01, v2015.01-rc4 |
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3bfbf32b |
| 16-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
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Revision tags: v2015.01-rc3, v2015.01-rc2, v2015.01-rc1 |
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5bef6fd7 |
| 07-Nov-2014 |
Stefan Roese <sr@denx.de> |
spi: Add designware master SPI DM driver used on SoCFPGA
This patch adds the driver for the Designware master SPI controller. This IP core is integrated on the Altera SoCFPGA. This implementation is
spi: Add designware master SPI DM driver used on SoCFPGA
This patch adds the driver for the Designware master SPI controller. This IP core is integrated on the Altera SoCFPGA. This implementation is a driver model (DM) implementation. So multiple SPI drivers can be used. Thats necessary, since SoCFPGA also integrates the Cadence QSPI controller used to connect the SPI NOR flashes. Without DM, using multiple SPI drivers is not possible.
This driver is very loosely based on the Linux driver. Most of the Linux driver is removed. Only the polling loop for the transfer is really used from this driver, as we don't support interrupts and DMA right now.
This is tested on the SoCrates SoCFPGA board using the SPI pins on the P14 header.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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10e8bf88 |
| 07-Nov-2014 |
Stefan Roese <sr@denx.de> |
spi: Add Cadence QSPI DM driver used by SoCFPGA
This driver is cloned from the Altera Rockerboard.org U-Boot repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With Some modification to suppo
spi: Add Cadence QSPI DM driver used by SoCFPGA
This driver is cloned from the Altera Rockerboard.org U-Boot repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With Some modification to support the U-Boot driver model (DM).
As mentioned above, in this new version I ported this driver to the new driver model (DM). One big advantage of this move is that now multiple SPI drivers can be enabled on one platform. And since the SoCFPGA also has the Designware SPI master controller integrated, this feature is really needed to support both controllers.
Because of this, this series needs the DT support for SoCFPGA to be applied. For DT based probing in the SPI DM.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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68e80fdd |
| 22-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-dm
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Revision tags: v2014.10 |
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fda6fac3 |
| 14-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested on:
- Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore
(not tested on Teg
dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested on:
- Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore
(not tested on Tegra124)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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623b6386 |
| 14-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: spi: Add soft_spi implementation
Add a new implementation of soft_spi that uses device tree to specify the GPIOs. This will replace soft_spi_legacy for boards which use driver model.
Signed-off
dm: spi: Add soft_spi implementation
Add a new implementation of soft_spi that uses device tree to specify the GPIOs. This will replace soft_spi_legacy for boards which use driver model.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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a666f39e |
| 14-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: spi: Rename soft_spi.c to soft_spi_legacy.c
Reserve the 'normal' name for use by driver model, and rename the old driver so that it is clear that it is for 'legacy' drivers only.
Signed-off-by:
dm: spi: Rename soft_spi.c to soft_spi_legacy.c
Reserve the 'normal' name for use by driver model, and rename the old driver so that it is clear that it is for 'legacy' drivers only.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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c60e1f25 |
| 14-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: sandbox: Add a SPI emulation uclass
U-Boot includes a SPI emulation driver already but it is not explicit, and is hidden in the SPI flash code.
Conceptually with sandbox's SPI implementation we
dm: sandbox: Add a SPI emulation uclass
U-Boot includes a SPI emulation driver already but it is not explicit, and is hidden in the SPI flash code.
Conceptually with sandbox's SPI implementation we have a layer which creates SPI bus transitions and a layer which interprets them, currently only for SPI flash. The latter is actually an emulation, and it should be possible to add more than one emulation - not just SPI flash.
Add a SPI emulation uclass so that other emulations can be plugged in to support different types of emulated devices on difference buses/chip selects.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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d7af6a48 |
| 14-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: spi: Add a uclass for SPI
Add a uclass which provides access to SPI buses and includes operations required by SPI.
For a time driver model will need to co-exist with the legacy SPI interface so
dm: spi: Add a uclass for SPI
Add a uclass which provides access to SPI buses and includes operations required by SPI.
For a time driver model will need to co-exist with the legacy SPI interface so some parts of the header file are changed depending on which is in use. The exports are adjusted also since some functions are not available with driver model.
Boards must define CONFIG_DM_SPI to use driver model for SPI.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> (Discussed some follow-up comments which will address in future add-ons)
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Revision tags: v2014.10-rc3, v2014.10-rc2, v2014.10-rc1 |
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dab5e346 |
| 16-Jul-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
Conflicts: boards.cfg
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