Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00 |
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9da3b6f0 |
| 13-Jun-2019 |
Johnny Huang <johnny_huang@aspeedtech.com> |
Merge branch 'aspeed-dev-v2019.04' into aspeed-master-v2019.04
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5a5499fb |
| 30-May-2019 |
ryan_chen <ryan_chen@aspeedtech.com> |
Merge branch 'ryan_port' into aspeed-dev-v2019.04
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499853d6 |
| 29-May-2019 |
ryan_chen <ryan_chen@aspeedtech.com> |
add fmc/spi driver
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Revision tags: v2019.04 |
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f18b7b27 |
| 06-Mar-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
- dw spi include file fix - Allwinner A31 spi, been in ML in many releases.
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a51cd54e |
| 27-Feb-2019 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Rename sun4i_spi.c into spi-sunxi.c
Now the same SPI controller driver is reusable in all Allwinner SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c which eventually look like
spi: Rename sun4i_spi.c into spi-sunxi.c
Now the same SPI controller driver is reusable in all Allwinner SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c which eventually look like a common sunxi driver.
Also update the function, variable, structure names in driver from sun4i into sunxi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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50e24381 |
| 07-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
- SPI-NOR support
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6430eea6 |
| 04-Feb-2019 |
Vignesh R <vigneshr@ti.com> |
spi: Add non DM version of SPI_MEM
Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete.
Signed-off-by: Vignesh R
spi: Add non DM version of SPI_MEM
Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete.
Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
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f83ef0da |
| 17-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips
- MIPS: mscc: various enhancements for Luton and Ocelot platforms - MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised
Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips
- MIPS: mscc: various enhancements for Luton and Ocelot platforms - MIPS: mscc: added support for Jaguar2 platform - MIPS: optimised SPL linker script - MIPS: bcm6368: fix restart flow issues - MIPS: fixed CONFIG_OF_EMBED warnings for all MIPS boards - MIPS: mt7688: small fixes and enhancements - mmc: compile-out write support if disabled
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fd6e0b05 |
| 08-Jan-2019 |
Lars Povlsen <lars.povlsen@microchip.com> |
mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for
mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the designware SPI hardware controller.
Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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9450ab2b |
| 05-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel
Signed-off-by: Tom Rini <trini@konsulko.co
Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel
Signed-off-by: Tom Rini <trini@konsulko.com>
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052cafd2 |
| 12-Oct-2018 |
Guochun Mao <guochun.mao@mediatek.com> |
spi: mtk_qspi: add qspi driver for MT7629 SoC
This patch adds MT7629 qspi driver for accessing SPI NOR flash.
Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Reviewed-by: Simon Glass <sjg@chr
spi: mtk_qspi: add qspi driver for MT7629 SoC
This patch adds MT7629 qspi driver for accessing SPI NOR flash.
Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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9d26506a |
| 22-Nov-2018 |
Neil Armstrong <narmstrong@baylibre.com> |
spi: Add Amlogic Meson SPI Flash Controller driver
The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC. This driver, ported from the Linux meson-spi-spifc driver, add support fo
spi: Add Amlogic Meson SPI Flash Controller driver
The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC. This driver, ported from the Linux meson-spi-spifc driver, add support for this controller on the Amlogic Meson GX SoCs in U-Boot.
Tested-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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ad8c9f61 |
| 04-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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5eee9dee |
| 16-Aug-2018 |
Stefan Roese <sr@denx.de> |
spi: Add SPI driver for MT76xx SoCs
This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NO
spi: Add SPI driver for MT76xx SoCs
This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart Gateway additionally with an SPI NAND on CS1.
Note that the SPI controller only supports a max transfer size of 32 bytes. This driver implementes a workaround to enable bigger xfer sizes to speed up the transfer especially for the SPI NAND support.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Piotr Dymacz <pepe2k@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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592cd5de |
| 02-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.
[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rin
Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.
[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
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8a4791fa |
| 31-Aug-2018 |
Quentin Schulz <quentin.schulz@bootlin.com> |
spi: add support for ARM PL022 SPI controller
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO.
A few
spi: add support for ARM PL022 SPI controller
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO.
A few parts were borrowed from the Linux kernel driver.
Cc: Armando Visconti <armando.visconti@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
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d13f5b25 |
| 16-Aug-2018 |
Boris Brezillon <boris.brezillon@bootlin.com> |
spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the cu
spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general.
This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs).
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
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bb694d4e |
| 04-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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Revision tags: v2018.07, v2018.03 |
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7f25d817 |
| 06-Feb-2018 |
Stefan Mavrodiev <stefan@olimex.com> |
arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Jaga
arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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3aae92fc |
| 16-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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22cca173 |
| 04-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
spi: zynqmp_gqspi: Add support for ZynqMP qspi driver
This patch adds qspi driver support for ZynqMP SoC. This driver is responsible for communicating with qspi flash devices.
Signed-off-by: Siva D
spi: zynqmp_gqspi: Add support for ZynqMP qspi driver
This patch adds qspi driver support for ZynqMP SoC. This driver is responsible for communicating with qspi flash devices.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> [jagan: removed GQSPI_MIO_NUM_ macros] Reviewed-by: Jagan Teki <jagan@openedev.com>
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894c3ad2 |
| 08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Bo
board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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93cb6142 |
| 13-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sh
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Revision tags: v2018.01 |
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fbebea27 |
| 28-Nov-2017 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
mtd: spi: Add Renesas RPC SPI-flash driver
Add driver for the RPC block in SPI-flash mode. This driver allows access to a SPI NOR flash attached to the RPC block and does not support RPC in Hyperfla
mtd: spi: Add Renesas RPC SPI-flash driver
Add driver for the RPC block in SPI-flash mode. This driver allows access to a SPI NOR flash attached to the RPC block and does not support RPC in Hyperflash mode. Note that this block is extremely selective when communicating with the SPI NOR.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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