Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01 |
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baa29d5e |
| 18-Jul-2019 |
Johnny Huang <johnny_huang@aspeedtech.com> |
Merge remote-tracking branch 'origin/aspeed-dev-v2019.04' into aspeed-master-v2019.04
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70accf71 |
| 16-Jul-2019 |
Johnny Huang <johnny_huang@aspeedtech.com> |
[fix] spl config define
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219d699c |
| 16-Jul-2019 |
Johnny Huang <johnny_huang@aspeedtech.com> |
[new] workaround: add SPL_TINY for g6 secure boot verify
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Revision tags: v2019.07, v00.02.00 |
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9da3b6f0 |
| 13-Jun-2019 |
Johnny Huang <johnny_huang@aspeedtech.com> |
Merge branch 'aspeed-dev-v2019.04' into aspeed-master-v2019.04
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b121e0db |
| 28-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
Merge branch 'feature/sdram_c_func' into aspeed-dev-v2019.04
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a0df4a63 |
| 27-May-2019 |
Dylan Hung <dylan_hung@aspeedtech.com> |
[update] revise makefile for SDRAM driver
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Revision tags: v2019.04 |
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e16c888f |
| 28-Nov-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch '2018-11-28-master-imports'
- Add MediaTek support
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60f633ef |
| 14-Nov-2018 |
Ryder Lee <ryder.lee@mediatek.com> |
ram: MediaTek: add DDR3 driver for MT7629 SoC
This patch adds a DDR3 driver for MT7629 SoC.
Signed-off-by: Wu Zou <wu.zou@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by
ram: MediaTek: add DDR3 driver for MT7629 SoC
This patch adds a DDR3 driver for MT7629 SoC.
Signed-off-by: Wu Zou <wu.zou@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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0c4b382f |
| 17-Nov-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch '2018-11-16-master-imports'
- Initial bcm968580xref, am65x_evm_r5 support - lpc32xx, omap3_logic/am3517_evm updates - pinctrl command - fs_loader available for SPL
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06bda125 |
| 02-Nov-2018 |
Lokesh Vutla <lokeshvutla@ti.com> |
ram: Introduce K3 AM654 DDR Sub System driver
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks int
ram: Introduce K3 AM654 DDR Sub System driver
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
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22929e12 |
| 26-Oct-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Complete in the drivers directory the work started with commit 83d290c56fab ("SPDX: Convert all of our single license tags to Linux
drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Complete in the drivers directory the work started with commit 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style").
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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4e710ebb |
| 18-Sep-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
- MPC83xx device tree additions (CPU and RAM) - Fix sandbox build error - Sync bitrev with Linux - Various ofnode/DT improvements
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e4061556 |
| 06-Aug-2018 |
Mario Six <mario.six@gdsys.cc> |
ram: Add driver for MPC83xx
Add a RAM driver for the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
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Revision tags: v2018.07, v2018.03 |
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e70f70aa |
| 12-Mar-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
ram: stm32mp1: add driver
Add driver and binding for stm32mp1 ddr controller and phy
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Revision tags: v2018.01, v2017.11 |
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c1b62ba9 |
| 14-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-rockchip
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403e9cbc |
| 22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: add DRAM controller driver with DRAM initialisation
This adds a DRAM controller driver for the RK3368 and places it in drivers/ram/rockchip (where the other DM-enabled DRAM control
rockchip: rk3368: add DRAM controller driver with DRAM initialisation
This adds a DRAM controller driver for the RK3368 and places it in drivers/ram/rockchip (where the other DM-enabled DRAM controller drivers for rockchip devices should also be moved eventually).
At this stage, only the following feature-set is supported: - DDR3 - 32-bit configuration (i.e. fully populated) - dual-rank (i.e. no auto-detection of ranks) - DDR3-1600K speed-bin
This driver expects to run from a TPL stage that will later return to the RK3368 BROM. It communicates with later stages through the os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR init code).
Unlike other DMC drivers for RK32xx and RK33xx parts, the required timings are calculated within the driver based on a target frequency and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this time).
The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0) register for controlling the operation of its (single-channel) DRAM controller in the GRF block. This provides for selecting DDR3, mobile DDR modes, and control low-power operation. As part of this change, DDRC0_CON0 is also added to the GRF structure definition (at offset 0x600).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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102d8655 |
| 10-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mips
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193030e5 |
| 24-Apr-2017 |
Álvaro Fernández Rojas <noltari@gmail.com> |
ram: add RAM driver for Broadcom MIPS SoCs
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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4f66e09b |
| 09-May-2017 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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bf1ae442 |
| 10-Apr-2017 |
Vikas Manocha <vikas.manocha@st.com> |
stm32f7: sdram: move sdram driver code to ram drivers area
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
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Revision tags: v2016.07, openbmc-20160624-1, v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07 |
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64ce0cad |
| 06-Jul-2015 |
Simon Glass <sjg@chromium.org> |
dm: test: Add a test for the ram uclass
Add a test to confirm that we can probe this device and get information on the available RAM.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2015.07-rc3 |
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6c51df68 |
| 23-Jun-2015 |
Simon Glass <sjg@chromium.org> |
dm: Add support for RAM drivers
Add support for a driver which sets up DRAM and can return information about the amount of RAM available. This is a first step towards moving RAM init to driver model
dm: Add support for RAM drivers
Add support for a driver which sets up DRAM and can return information about the amount of RAM available. This is a first step towards moving RAM init to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
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