History log of /openbmc/u-boot/drivers/pci/pcie_layerscape.c (Results 26 – 50 of 111)
Revision Date Author Comments
# 6e2941d7 17-May-2017 Simon Glass <sjg@chromium.org>

common: freescale: Move arch-specific declarations

The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass <sjg@chromium.o

common: freescale: Move arch-specific declarations

The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini <trini@konsulko.com>

show more ...


# b07d044d 03-Jun-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-sunxi


# 380e86f3 26-May-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-fsl-qoriq


# e809e747 27-Apr-2017 Priyanka Jain <priyanka.jain@nxp.com>

armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support

The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivativ

armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support

The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A (non-AIOP personality of LS2088A). So feature-wise it is
same as LS2084A. LS2041A is a 4-core personality of LS2081A.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

show more ...


# 16225590 13-Apr-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

Drop CONFIG_STACKSIZE from include/configs/imx6_logic.h

Signed-off-by: Tom Rini <trini@konsulko.com>


# 04735a8f 08-Apr-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-samsung


# 3b19c1db 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-tegra


# 4951e942 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-arc

In this patch-set we add support of new AXS103 firmware as well as
troubleshoot unexpected execution by multiple cores simultaneously.


# 5f9518b2 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-mmc


# 7d67bb1d 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# f5327036 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://www.denx.de/git/u-boot-marvell

This includes Marvell mvpp2 patches with the ethernet support for the
ARMv8 Armada 7k/8k platforms. The ethernet patches are all acked by Joe

Merge git://www.denx.de/git/u-boot-marvell

This includes Marvell mvpp2 patches with the ethernet support for the
ARMv8 Armada 7k/8k platforms. The ethernet patches are all acked by Joe
and he is okay with me pushing them via the Marvell tree.

show more ...


# 797f165f 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-fsl-qoriq


# 3d8553f0 02-Mar-2017 Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

pci: layerscape: add LS2088A series SoC pcie support

The LS2088A series SoCs has different physical memory map address and
CCSR registers address against LS2080A series SoCs.

Si

pci: layerscape: add LS2088A series SoC pcie support

The LS2088A series SoCs has different physical memory map address and
CCSR registers address against LS2080A series SoCs.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

show more ...


# d170aca1 10-Feb-2017 Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

pci: layerscape: enable PCIe config ready

In EP mode, to enable accesses from the Root Complex, the
CONFIG_READY bit must be set, otherwise any config attempts
from the Root Complex

pci: layerscape: enable PCIe config ready

In EP mode, to enable accesses from the Root Complex, the
CONFIG_READY bit must be set, otherwise any config attempts
from the Root Complex will be returned with config retry
status (CRS).

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

show more ...


# f1cc9776 09-Feb-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-video


# e1a71f8b 09-Feb-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net


# 576a085c 08-Feb-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga


# 21342d4a 08-Feb-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# e160f7d4 17-Jan-2017 Simon Glass <sjg@chromium.org>

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>

show more ...


# 0675f992 19-Jan-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-fsl-qoriq


# 9fa2a4fc 13-Dec-2016 Minghuan Lian <Minghuan.Lian@nxp.com>

pci: layerscape: remove unnecessary legacy code

All Layerscape SoCs have supported new PCIe driver based on DM.
The lagecy PCIe driver code is unused and can be removed.

Signed-

pci: layerscape: remove unnecessary legacy code

All Layerscape SoCs have supported new PCIe driver based on DM.
The lagecy PCIe driver code is unused and can be removed.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>

show more ...


# 80afc63f 13-Dec-2016 Minghuan Lian <Minghuan.Lian@nxp.com>

pci: layerscape: add pci driver based on DM

There are more than five kinds of Layerscape SoCs. unfortunately,
PCIe controller of each SoC is a little bit different. In order
to avoid

pci: layerscape: add pci driver based on DM

There are more than five kinds of Layerscape SoCs. unfortunately,
PCIe controller of each SoC is a little bit different. In order
to avoid too many macro definitions, the patch addes a new
implementation of PCIe driver based on DM. PCIe dts node is
used to describe the difference.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>

show more ...


# a7294aba 13-Dec-2016 Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

pci: layerscape: move kernel DT fixup to a separate file

To make the layerscape pcie driver clear, move the kernel DT fixup
code from pcie_layerscape.c to pcie_layerscape_fixup.c.

pci: layerscape: move kernel DT fixup to a separate file

To make the layerscape pcie driver clear, move the kernel DT fixup
code from pcie_layerscape.c to pcie_layerscape_fixup.c.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>

show more ...


# 2313d484 20-Jun-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-nand-flash


# dc557e9a 18-Jun-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


12345