| #
c507d306 |
| 04-Mar-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'u-boot-atmel-2019.04-a' of git://git.denx.de/u-boot-atmel
First set of u-boot-atmel fixes for 2019.04 cycle
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| #
da206916 |
| 28-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Various Bananapi fixes
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| #
176b32cd |
| 20-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq
- Support of NXP's LX2160RDB and LX2160QDS platform
- Enable SATA DM model for NXP's ARM SoCs
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| #
b78a9e22 |
| 18-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Misc Gen5 fixes
- stratix10 bugfix
- dwmmc bugfix
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| #
4f1267ce |
| 13-Jan-2019 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
net: designware: socfpga: adapt to Gen5
This driver was written for Arria10, but it applies to Gen5, too.
The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
sys
net: designware: socfpga: adapt to Gen5
This driver was written for Arria10, but it applies to Gen5, too.
The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded in the same register, thus an offset is needed.
This offset is already read from the devicetree, but for Arria10 it is
always 0, which is probably why it has been ignored. By using this
offset when writing the phy mode into the syscon regiter, we can use
this driver to set the phy mode for both of the MACs on Gen5.
Since the PHY mode bits in sysmgr are the same even for Stratix10,
let's drop the detection of the sub-mach by checking compatible
version and just use the same code for all FPGAs.
To work correctly, this driver depends on SYSCON and REGMAP, so select
those via Kconfig when it is enabeld.
Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
offset is required).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
show more ...
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| #
b71d9e8b |
| 20-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
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| #
8297e648 |
| 17-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sh
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| #
719afeb0 |
| 17-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
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| #
215a0656 |
| 13-Aug-2018 |
Marek Vasut <marex@denx.de> |
net: designware: socfpga: Add Arria10 extras
Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
sysc
net: designware: socfpga: Add Arria10 extras
Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
syscon phy_intf.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
show more ...
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