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27a4b3bc |
| 23-Feb-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: make it possible to compile out ADMA support Some platforms don't have ADMA controllers. For those platforms, compiling it out reduces the size of the binary by about 60
mmc: omap_hsmmc: make it possible to compile out ADMA support Some platforms don't have ADMA controllers. For those platforms, compiling it out reduces the size of the binary by about 600 bytes. Leaving the support in doesn't break things as the driver checks at runtime if the ADMA2 controller is present. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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c7d08d80 |
| 23-Feb-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: compile out write support if not needed This reduces the size of the binary by about 196 bytes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by:
mmc: omap_hsmmc: compile out write support if not needed This reduces the size of the binary by about 196 bytes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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45530e39 |
| 23-Feb-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat The area for struct mmc can be allocated dynamically. It greatly reduces the size of struct omap_hsmmc_plat. This is us
mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat The area for struct mmc can be allocated dynamically. It greatly reduces the size of struct omap_hsmmc_plat. This is useful in cases where the board level code declares one or two struct omap_hsmmc_plat because it doesn't use the Driver Model. This saves around 740 bytes for the am335x_evm SPL. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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e12546de |
| 25-Feb-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-imx
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7b1cfec3 |
| 19-Feb-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mmc
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4a41fec5 |
| 09-Feb-2018 |
Alex Kiernan <alex.kiernan@gmail.com> |
mmc: Fix uninitialised priv member When using omap_hsmmc without the device model then the allocation of mmc->priv ends up uninitialised. Signed-off-by: Alex Kiernan <alex.kiern
mmc: Fix uninitialised priv member When using omap_hsmmc without the device model then the allocation of mmc->priv ends up uninitialised. Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Tested-by: Robert Nelson <robertcnelson@gmail.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
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04f9f8be |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: add signal voltage selection support I/O data lines of UHS SD card operates at 1.8V when in UHS speed mode (same is true for eMMC in DDR and HS200 modes). Add support
mmc: omap_hsmmc: add signal voltage selection support I/O data lines of UHS SD card operates at 1.8V when in UHS speed mode (same is true for eMMC in DDR and HS200 modes). Add support to switch signal voltage to 1.8V in order to support UHS cards and eMMC HS200 and DDR modes. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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90321dce |
| 30-Jan-2018 |
Kishon Vijay Abraham I <kishon@ti.com> |
mmc: omap_hsmmc: allow mmc clock to be gated mmc core has defined a new parameter *clk_disable* to gate the clock. Disable the clock here if *clk_disable* is set. Signed-off-by:
mmc: omap_hsmmc: allow mmc clock to be gated mmc core has defined a new parameter *clk_disable* to gate the clock. Disable the clock here if *clk_disable* is set. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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42182c9b |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: implement send_init_stream callback This callback is used to send the 74 clock cycles after power up. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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3149c13a |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: update mmc->clock with the actual bus speed When the clock is applied, compute the actual value of the clock. It may be slightly different from the requested value (max
mmc: omap_hsmmc: update mmc->clock with the actual bus speed When the clock is applied, compute the actual value of the clock. It may be slightly different from the requested value (max freq, divisor threshold) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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bcc6bd84 |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl The default configuration is usually working fine for the the HS modes. Don't enforce the presence of a dedicated pi
mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl The default configuration is usually working fine for the the HS modes. Don't enforce the presence of a dedicated pinmux for the HS modes. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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2d28eeda |
| 30-Jan-2018 |
Kishon Vijay Abraham I <kishon@ti.com> |
mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions AM572x SR1.1 requires different IODelay values to be used than that used in AM572x SR2.0.
mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions AM572x SR1.1 requires different IODelay values to be used than that used in AM572x SR2.0. These values are populated in device tree. Add capability in omap_hsmmc driver to extract IOdelay values for different silicon revision. The maximum frequency is also reduced when using a ES1.1. To keep the ability to boot both revsions with the same dtb, those values can be provided by the platform code. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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33c1d77f |
| 30-Jan-2018 |
Kishon Vijay Abraham I <kishon@ti.com> |
mmc: omap_hsmmc: Add support to set IODELAY values The data manual of J6/J6 Eco recommends to set different IODELAY values depending on the mode in which the MMC/SD is enumerated in orde
mmc: omap_hsmmc: Add support to set IODELAY values The data manual of J6/J6 Eco recommends to set different IODELAY values depending on the mode in which the MMC/SD is enumerated in order to ensure IO timings are met. Add support to parse mux values and iodelay values from device tree and set these depending on the enumerated MMC mode. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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2d7482cf |
| 30-Jan-2018 |
Kishon Vijay Abraham I <kishon@ti.com> |
mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config Use the mmc_of_parse library function to populate mmc_config instead of repeating the same code in host controller driver.
mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config Use the mmc_of_parse library function to populate mmc_config instead of repeating the same code in host controller driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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a4efd737 |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm >From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines reset procedure section in TRM suggests to firs
mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm >From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines reset procedure section in TRM suggests to first poll the SRD/SRC bit until it is set to 0x1. But looks like that bit is never set to 1 and there is an observable delay of 1sec everytime the driver tries to reset DAT/CMD. (The same is observed in linux kernel). Reduce the time the driver waits for the controller to set the SRC/SRD bits to 1 so that there is no observable delay. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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2faa1a30 |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: Workaround for errata id i802 According to errata i802, DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure. The DCRC interrup
mmc: omap_hsmmc: Workaround for errata id i802 According to errata i802, DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure. The DCRC interrupt, occurs when the last tuning block fails (the last ratio tested). The delay from CRC check until the interrupt is asserted is bigger than the delay until assertion of the tuning end flag. Assertion of tuning end flag is what masks the interrupts. Because of this race, an erroneous DCRC interrupt occurs. The suggested workaround is to disable DCRC interrupts during the tuning procedure which is implemented here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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14761cae |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: Add tuning support HS200/SDR104 requires tuning command to be sent to the card. Use the mmc_send_tuning library function to send the tuning command and configure the
mmc: omap_hsmmc: Add tuning support HS200/SDR104 requires tuning command to be sent to the card. Use the mmc_send_tuning library function to send the tuning command and configure the internal DLL. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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9b3fc218 |
| 30-Jan-2018 |
Kishon Vijay Abraham I <kishon@ti.com> |
mmc: omap_hsmmc: Enable DDR mode support In order to enable DDR mode, Dual Data Rate mode bit has to be set in MMCHS_CON register. Set it here. Signed-off-by: Kishon Vijay Abrah
mmc: omap_hsmmc: Enable DDR mode support In order to enable DDR mode, Dual Data Rate mode bit has to be set in MMCHS_CON register. Set it here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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8fc238bf |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: set MMC mode in the UHSMS bit field Use the timing parameter set in the MMC core to set the mode in UHSMS bit field. This is in preparation for adding HS200 support
mmc: omap_hsmmc: set MMC mode in the UHSMS bit field Use the timing parameter set in the MMC core to set the mode in UHSMS bit field. This is in preparation for adding HS200 support in omap hsmmc driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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b5944817 |
| 30-Jan-2018 |
Kishon Vijay Abraham I <kishon@ti.com> |
mmc: omap_hsmmc: add support to set default io voltage "ti,dual-volt" is used in linux kernel to set the voltage capabilities. For host controller dt nodes that doesn't have "ti,dual-vol
mmc: omap_hsmmc: add support to set default io voltage "ti,dual-volt" is used in linux kernel to set the voltage capabilities. For host controller dt nodes that doesn't have "ti,dual-volt", it's assumed 1.8v is the io voltage. This is not always true (like in the case of beagle-x15 where the io lines are connected to 3.3v). Hence if "no-1-8-v" property is set, io voltage will be set to 3v. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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48a2f114 |
| 30-Jan-2018 |
Kishon Vijay Abraham I <kishon@ti.com> |
mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios No functional change. Move bus width configuration setting to a separate function and invoke it only if there is a change in the bus width
mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios No functional change. Move bus width configuration setting to a separate function and invoke it only if there is a change in the bus width. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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5baf543e |
| 30-Jan-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
mmc: omap_hsmmc: cleanup clock configuration Add a separate function for starting the clock, stopping the clock and setting the clock. Starting the clock and stopping the clock can b
mmc: omap_hsmmc: cleanup clock configuration Add a separate function for starting the clock, stopping the clock and setting the clock. Starting the clock and stopping the clock can be used irrespective of setting the clock (For example during iodelay recalibration). Also set the clock only if there is a change in frequency. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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ab21ecef |
| 31-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze Xilinx changes for v2018.03 - Several Kconfig fixes (also moving configs to defconfigs) - Some DTS updates
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze Xilinx changes for v2018.03 - Several Kconfig fixes (also moving configs to defconfigs) - Some DTS updates - ZynqMP psu rework based on Zynq concept - Add low level initialization for zc770 and zcu102 - Add support for Zynq zc770 x16 nand configuration - Add mini nand/emmc ZynqMP targets - Some arasan nand changes
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1d12a7c8 |
| 26-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-spi
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557767ed |
| 20-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-marvell
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