Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01 |
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dfa4b54c |
| 14-Jul-2021 |
Joel Stanley <joel@jms.id.au> |
crypto: Restore old driver for Aspeed HACE
The HACE supports MD5, SHA1 and SHA2 family hash functions. This driver uses it in a polling mode to perform hash calculations over buffers placed in DRAM.
crypto: Restore old driver for Aspeed HACE
The HACE supports MD5, SHA1 and SHA2 family hash functions. This driver uses it in a polling mode to perform hash calculations over buffers placed in DRAM.
It also includes a workaround[1] that performs a reset when error occurs. This is incompatible with simultaneous operation of the ACRY hardware, as the HACE reset line is shared with the ACRY hardware. It should only be used as a workaround for when the ASPEED_HACE driver, which uses accumulative mode, cannot be used.
[1] https://lore.kernel.org/r/20210715045258.13912-1-joel@jms.id.au
Currently simulator for support for accumulative mode is not in place, so this driver exists for supporting machines that must boot in a simulator.
Signed-off-by: Joel Stanley <joel@jms.id.au>
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5c5ceee2 |
| 06-Apr-2022 |
Neal Liu <neal_liu@aspeedtech.com> |
crypto: aspeed: combine acry drivers into a file
1. Combine acry drivers into a file 2. Set AHB access mode for ACRY SRAM by default to avoid bus hang.
Signed-off-by: Neal Liu <neal_liu@aspeedtech.
crypto: aspeed: combine acry drivers into a file
1. Combine acry drivers into a file 2. Set AHB access mode for ACRY SRAM by default to avoid bus hang.
Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Change-Id: I7896052502bbb1cd7e2099bec8439e9a0b15ad3b
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4f7bd3b2 |
| 29-Jul-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
aspeed: cosmetic: Rename ARCY to ACRY
v2: Fix typo in defconfigs
v1: Fix the typo of ARCY to ACRY.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Change-Id: Ieeada4ff502fa6d327831a4b7e
aspeed: cosmetic: Rename ARCY to ACRY
v2: Fix typo in defconfigs
v1: Fix the typo of ARCY to ACRY.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Change-Id: Ieeada4ff502fa6d327831a4b7e4dd5001c1f26c3
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5620c876 |
| 13-May-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
crypto: Add Aspeed ARCY support
ARCY is the HW ECC/RSA crypto engine supported by Aspeed AST26xx SoCs. This patch enables ARCY clock and add RSA exponent/modulus HW acceleration.
Signed-off-by: Chi
crypto: Add Aspeed ARCY support
ARCY is the HW ECC/RSA crypto engine supported by Aspeed AST26xx SoCs. This patch enables ARCY clock and add RSA exponent/modulus HW acceleration.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Change-Id: I806b677c9d6f885e91f6d87afbc1e4c0b8fa9393
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Revision tags: v00.04.00 |
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e31caa5a |
| 03-May-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
crypto: Add Aspeed HACE support
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Change-Id: Ia4f95179c58dfb3ffb5bc20ddca9aef73083309c
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Revision tags: v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07 |
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Revision tags: v2018.03, v2018.01, v2017.11, v2016.07, openbmc-20160624-1, v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1, v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3 |
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e1cc4d31 |
| 24-Feb-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'
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Revision tags: v2015.04-rc2 |
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e72d3443 |
| 13-Feb-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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Revision tags: v2015.04-rc1 |
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8e3da9dd |
| 30-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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31d2b4fd |
| 23-Jan-2015 |
Ruchika Gupta <ruchika.gupta@freescale.com> |
DM: crypto/rsa_mod_exp: Add rsa Modular Exponentiation DM driver
Add a new rsa uclass for performing modular exponentiation and implement the software driver basing on this uclass.
Signed-off-by: R
DM: crypto/rsa_mod_exp: Add rsa Modular Exponentiation DM driver
Add a new rsa uclass for performing modular exponentiation and implement the software driver basing on this uclass.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2015.01, v2015.01-rc4, v2015.01-rc3, v2015.01-rc2, v2015.01-rc1 |
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a84c8107 |
| 20-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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b9eebfad |
| 15-Oct-2014 |
Ruchika Gupta <ruchika.gupta@freescale.com> |
fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam. The platform
fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam. The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to enable initialization of this hardware IP.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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Revision tags: v2014.10, v2014.10-rc3, v2014.10-rc2, v2014.10-rc1, v2014.07, v2014.07-rc4, v2014.07-rc3, v2014.07-rc2, v2014.07-rc1, v2014.04, v2014.04-rc3, v2014.04-rc2, v2014.04-rc1, v2014.01, v2014.01-rc3, v2014.01-rc2, v2014.01-rc1 |
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710f1d3d |
| 17-Oct-2013 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
drivers: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Revision tags: v2013.10, v2013.10-rc4, v2013.10-rc3, v2013.10-rc2, v2013.10-rc1 |
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326ea986 |
| 31-Jul-2013 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <s
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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8b485ba1 |
| 25-Jul-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into u-boot-arm/master
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Revision tags: v2013.07, v2013.07-rc3 |
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1a459660 |
| 08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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Revision tags: v2013.07-rc2, v2013.07-rc1, v2013.04, v2013.04-rc3 |
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17059f97 |
| 15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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fed029f3 |
| 04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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Revision tags: v2013.04-rc2 |
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acbb1eb7 |
| 20-Mar-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung
Exynos: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
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