clk: Remove DM_FLAG_PRE_RELOC flag in various driversWhen a driver declares DM_FLAG_PRE_RELOC flag, it wishes to bebound before relocation. However due to a bug in the DM core,the flag only takes
clk: Remove DM_FLAG_PRE_RELOC flag in various driversWhen a driver declares DM_FLAG_PRE_RELOC flag, it wishes to bebound before relocation. However due to a bug in the DM core,the flag only takes effect when devices are statically declaredvia U_BOOT_DEVICE(). This bug has been fixed recently by commit"dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag inlists_bind_fdt()", but with the fix, it has a side effect thatall existing drivers that declared DM_FLAG_PRE_RELOC flag willbe bound before relocation now. This may expose potential bootfailure on some boards due to insufficient memory during thepre-relocation stage.To mitigate this potential impact, the following changes areimplemented:- Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver only supports configuration from device tree (OF_CONTROL)- Keep DM_FLAG_PRE_RELOC flag in the driver only if the device is statically declared via U_BOOT_DEVICE()- Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for drivers that support both statically declared devices and configuration from device treeSigned-off-by: Bin Meng <bmeng.cn@gmail.com>Reviewed-by: Simon Glass <sjg@chromium.org>
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drivers: cosmetic: Convert SPDX license tags to Linux Kernel styleComplete in the drivers directory the work started withcommit 83d290c56fab ("SPDX: Convert all of our singlelicense tags to Linux
drivers: cosmetic: Convert SPDX license tags to Linux Kernel styleComplete in the drivers directory the work started withcommit 83d290c56fab ("SPDX: Convert all of our singlelicense tags to Linux Kernel style").Reviewed-by: Simon Glass <sjg@chromium.org>Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
clk: socfpga: Add initial Arria10 clock driverAdd clock driver for the Arria10, which allows reading the clockfrequency from all the clock described in the DT. The driver alsoallows enabling and
clk: socfpga: Add initial Arria10 clock driverAdd clock driver for the Arria10, which allows reading the clockfrequency from all the clock described in the DT. The driver alsoallows enabling and disabling the clock. Reconfiguring frequencyis not supported thus far.Since the DT bindings for the SoCFPGA clock are massively misdesignedand the handoff DT adds additional incorrectly described entries tothe DT, the driver contains workarounds which attempt to rectify allof those problems.Signed-off-by: Marek Vasut <marex@denx.de>Cc: Chin Liang See <chin.liang.see@intel.com>Cc: Dinh Nguyen <dinguyen@kernel.org>Cc: Ley Foon Tan <ley.foon.tan@intel.com>