Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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66c433ed |
| 31-Mar-2019 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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2b9b9cdd |
| 26-Mar-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch '2019-03-25-master-imports'
- Convert various SPI related options to Kconfig
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14453fbf |
| 27-Feb-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
Convert CONFIG_SF_DEFAULT_* to Kconfig
This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED
I use moveconfig scr
Convert CONFIG_SF_DEFAULT_* to Kconfig
This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED
I use moveconfig script and then manual check on generated u-boot.cfg to solve the remaining issue.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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d391c13c |
| 15-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04-rc2
xilinx: - Start to use distro boot commands first - Setup fdtfile on ZynqMP - Move mac add
Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04-rc2
xilinx: - Start to use distro boot commands first - Setup fdtfile on ZynqMP - Move mac addr eeprom read to common location - Convert to OF_SEPARATE - Switch all board to DM_I2C - Some DT syncs
i2c: - Remove !DM_I2C zynq driver
versal: - Enable some more features - Add mini configurations
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217bb295 |
| 22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
ARM: zynq: Convert dlc20 and zc70x board to DM_I2C
All these board have also eeprom enabled that's why it is also enabled via defconfig. There is also no need to have zc70x specific config file that
ARM: zynq: Convert dlc20 and zc70x board to DM_I2C
All these board have also eeprom enabled that's why it is also enabled via defconfig. There is also no need to have zc70x specific config file that's why also remove it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
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d13f92b7 |
| 03-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
ARM: zynq: Run distribution boot commands first
This patch is doing two things. 1. Exchanging order of boot commands. distro_bootcmd is run first followed by Xilinx boot command. 2. Remove CONFIG_BO
ARM: zynq: Run distribution boot commands first
This patch is doing two things. 1. Exchanging order of boot commands. distro_bootcmd is run first followed by Xilinx boot command. 2. Remove CONFIG_BOOTCOMMAND from configs (and follow mainline) by creating Xilinx distribution bootcommand and wiring it as the last bootcommand.
QSPI, NAND distribution boot command will be added later.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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50e24381 |
| 07-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
- SPI-NOR support
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6d825178 |
| 04-Feb-2019 |
Vignesh R <vigneshr@ti.com> |
configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing
configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality.
Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
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1bac199e |
| 07-Jan-2019 |
Tom Rini <trini@konsulko.com> |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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0a3d59e0 |
| 03-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.01
microblaze: - Use default functions for memory decoding - Showing model from DT
zynq: - Fix spi f
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.01
microblaze: - Use default functions for memory decoding - Showing model from DT
zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets
zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting
nand: - arasan: Add subpage configuration
net: - gem: Add 64bit DMA support
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Revision tags: v2018.07, v2018.03 |
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2b4367df |
| 17-Jan-2018 |
Michal Simek <michal.simek@xilinx.com> |
ARM: zynq: Enable mtest command at least on one platform
mtest is being checked by test/py framework and this test should run at least on one platform that's why enabling mtest on zc702.
Signed-off
ARM: zynq: Enable mtest command at least on one platform
mtest is being checked by test/py framework and this test should run at least on one platform that's why enabling mtest on zc702.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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8c5cad05 |
| 03-Sep-2018 |
Tom Rini <trini@konsulko.com> |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
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d7869b21 |
| 20-Jul-2018 |
Adam Ford <aford173@gmail.com> |
Convert CONFIG_MII et al to Kconfig
This converts the following to Kconfig: CONFIG_MII CONFIG_DRIVER_TI_EMAC
Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Jagan Teki <jagan@amarulas
Convert CONFIG_MII et al to Kconfig
This converts the following to Kconfig: CONFIG_MII CONFIG_DRIVER_TI_EMAC
Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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188ebc7b |
| 07-Aug-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.09-rc2
xilinx: - Add support for zybo z7 and ultra96 - Tune zynq and zynqmp mini configurations - M
Merge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.09-rc2
xilinx: - Add support for zybo z7 and ultra96 - Tune zynq and zynqmp mini configurations - Move SYS_MALLOC_LEN to Kconfig
fdt - make static funcs
gpio: - Fix soft gpio driver - Fix Zynq gpio driver by using platdata
microblaze: - Fix Kconfig entry
spi - Move ISSI to Kconfig
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Revision tags: v2018.01, v2017.11, v2016.07, openbmc-20160624-1 |
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13f451bf |
| 25-Jan-2016 |
Michal Simek <michal.simek@xilinx.com> |
spi: Kconfig: Create ISSI Kconfig entry
Add ISSI to Kconfig to make it selectable via menuconfig. Also convert all current platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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f7e48c54 |
| 19-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09
clk: - Fix zynqmp clock driver
common: - Handle CMD_RET_USAGE in cmd_process_error - Use return m
Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09
clk: - Fix zynqmp clock driver
common: - Handle CMD_RET_USAGE in cmd_process_error - Use return macros in cmd_process_error - Fix duplication of CONFIG_SYS_PROMPT_HUSH_PS2 - Support watchdog in usb_kbd.c - Fix name usage in usb_kbd.c - Support systems with non zero memory start initialized from DT only
gpio: - Add support for manual relocation in uclass - zynq - use live tree - zynq - fix match data reading - zynq - setup bank name - xilinx - convert driver to DM
microblaze: - Use generic iounmap/ioremap implementations - Redesign reset logic with sysreset features - Use watchdog and gpio over DM - Remove unused macros and fix some checkpatch issues - Fix timer initialization not to be called twice
serial: - zynq - Use platdata intead of priv data
sysreset: - Add support for manual relocation in uclass - Add gpio-restart driver - Add microblaze soft reset driver
watchdog: - Add support for aliases in uclass - Add support for manual relocation in uclass - Convert xilinx driver to DM - cadence - update info in the driver and not stop wdt in probe
xilinx: - Enable LED gpio for some targets with gpio-leds DT node - Setup variables via Kconfig
zynq: - Add support for watchdog aliases - Add support for mini nand/nor configurations - Wire FPGA initalization in SPL
zynqmp: - Enable mass storage for zcu100 - Handle external pmufw files - Add support for secure images - Some Kconfig movements and alignments - Add support for watchdog aliases - Use subcommands style for platform command - Add mmio_read/write platform commands - DT updates - Add support for mini qspi configuration
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f5ed3605 |
| 16-Jul-2018 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Enable led support for some boards
Enable led support for boards which have "gpio-leds" node. And also for microblaze which is converted to DM_GPIO now. Tested on zcu100.
Signed-off-by: Mic
xilinx: Enable led support for some boards
Enable led support for boards which have "gpio-leds" node. And also for microblaze which is converted to DM_GPIO now. Tested on zcu100.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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dcd8a102 |
| 04-Jun-2018 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Sync symbols location in defconfigs
CONFIG_DEBUG_UART_BASE and CONFIG_DEBUG_UART_CLOCK have changed that's why this sync.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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3b52847a |
| 11-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.07
microblaze: - Align defconfig
zynq: - Rework fpga initialization and cpuinfo handling
zynqmp
Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.07
microblaze: - Align defconfig
zynq: - Rework fpga initialization and cpuinfo handling
zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING
zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation
mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode
nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params
scsi: - convert ceva sata to UCLASS_AHCI
timer: - Add Cadence TTC for ZynqMP r5
watchdog: - Minor cadence driver cleanup
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0b4b82ad |
| 28-Feb-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO
Now that showing silicon version is part of the CPU info display, let's remove checkboard().
Note that the generic show_board_info() will sti
arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO
Now that showing silicon version is part of the CPU info display, let's remove checkboard().
Note that the generic show_board_info() will still show the DT 'model' property. For instance:
U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)
CPU: Zynq 7z045 Silicon: v1.0 Model: Zynq ZC706 Development Board I2C: ready
Based on patches from Ariel D'Alessandro <ariel@vanguardiasur.com.ar>, and Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
mini configuration doesn't need to show this information.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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002c3234 |
| 20-Apr-2018 |
Alex Kiernan <alex.kiernan@gmail.com> |
Migrate IMAGE_FORMAT_LEGACY to Kconfig
This converts IMAGE_FORMAT_LEGACY to Kconfig
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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55500438 |
| 07-Apr-2018 |
Marek Vasut <marek.vasut@gmail.com> |
spl: spi: Move CONFIG_SPL_SPI_LOAD to Kconfig
Add Kconfig entry for CONFIG_SPL_SPI_LOAD symbol and move all configurations using it to Kconfig.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail
spl: spi: Move CONFIG_SPL_SPI_LOAD to Kconfig
Add Kconfig entry for CONFIG_SPL_SPI_LOAD symbol and move all configurations using it to Kconfig.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Tom Rini <trini@konsulko.com>
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89a650e0 |
| 25-Mar-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05
- Fix mkimage recognition - Update all my fragments
ZynqMP: - Use clk driver - Support loading el
Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05
- Fix mkimage recognition - Update all my fragments
ZynqMP: - Use clk driver - Support loading elfs in el1 - Various DTS and defconfig changes - Enable newer pmufw versions - Support more clocks - Remove ep108 - Secure image support - Fix memtest setup
Zynq: - Enabling watchdog driver - Support more clocks - defconfig changes
fpga: - Simplify error path
net: - GMII case update
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734bf172 |
| 23-Mar-2018 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Sync defconfigs with latest Kconfig updates
Make defconfigs up2date with current location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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6256b02d |
| 01-Mar-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx Kconfig changes for v2018.03
- Moving some macros to Kconfig
# gpg: Signature made Thu 01 Mar 2018 10:45:5
Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx Kconfig changes for v2018.03
- Moving some macros to Kconfig
# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21 # gpg: Good signature from "Michal Simek <monstr@monstr.eu>" # gpg: aka "Michal Simek (Xilinx) <michals@xilinx.com>" # gpg: aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
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