configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge tag 'u-boot-amlogic-20190131' of git://git.denx.de/u-boot-amlogic

- Add features and fixups to support video on Amlogic GX SoCs
- Add video support for Amlogic GX SoC
- Add DT fixups
- Enable

Merge tag 'u-boot-amlogic-20190131' of git://git.denx.de/u-boot-amlogic

- Add features and fixups to support video on Amlogic GX SoCs
- Add video support for Amlogic GX SoC
- Add DT fixups
- Enable Video and USB Console for libretech-cc board

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arm: meson64: enable console mux and console env by default

With the recent addition of the meson VPU driver, enable the following
config entries by default for meson-64 targets: CONFIG_CONSOLE_MUX,

arm: meson64: enable console mux and console env by default

With the recent addition of the meson VPU driver, enable the following
config entries by default for meson-64 targets: CONFIG_CONSOLE_MUX,
CONFIG_SYS_CONSOLE_IS_IN_ENV.

This allows outputting the console via video if CONFIG_VIDEO_MESON is
selected.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>

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configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogic

Cleanup and update towards support for Amlogic Meson AXG SoCs :
- mmc: meson-gx: Add AXG compatible
- net: designware: add mes

Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogic

Cleanup and update towards support for Amlogic Meson AXG SoCs :
- mmc: meson-gx: Add AXG compatible
- net: designware: add meson meson compatibles
- Amlogic Meson cleanup for AXG SoC support

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ARM: rework amlogic configuration

Rework the board SYS_BOARD, SYS_VENDOR and SYS_CONFIG_NAME setup by moving
the board Kconfig into the mach-meson Kconfig to make it easier to add
new boards for a S

ARM: rework amlogic configuration

Rework the board SYS_BOARD, SYS_VENDOR and SYS_CONFIG_NAME setup by moving
the board Kconfig into the mach-meson Kconfig to make it easier to add
new boards for a SoC architecture and add a custom config header or custom
board handler for a platform.

This drops the board CONFIGs and the duplicate boards configs headers in
favor of a single meson64.h config header.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

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configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

Convert CONFIG_MISC_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_MISC_INIT_R

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update the defaults logic slightly]
Signed-

Convert CONFIG_MISC_INIT_R to Kconfig

This converts the following to Kconfig:
CONFIG_MISC_INIT_R

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update the defaults logic slightly]
Signed-off-by: Tom Rini <trini@konsulko.com>

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configs: Migrate CONFIG_NR_DRAM_BANKS

We have the following cases:
- CONFIG_NR_DRAM_BANKS was defined, migrate normally
- CONFIG_NR_DRAM_BANKS_MAX was defined and then used for
CONFIG_NR_DRAM_BANK

configs: Migrate CONFIG_NR_DRAM_BANKS

We have the following cases:
- CONFIG_NR_DRAM_BANKS was defined, migrate normally
- CONFIG_NR_DRAM_BANKS_MAX was defined and then used for
CONFIG_NR_DRAM_BANKS after a check, just migrate it over now.
- CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 +
2), set this to 8.

Signed-off-by: Tom Rini <trini@konsulko.com>

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configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

configs: Update Meson GX configs

Enable USB on all Amlogic Meson GXL based board.
Enable Regulator support on all boards.
Enable ADC support on the LibreTech-CC board.

Signed-off-by: Neil Armstrong

configs: Update Meson GX configs

Enable USB on all Amlogic Meson GXL based board.
Enable Regulator support on all boards.
Enable ADC support on the LibreTech-CC board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

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configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-net

net: phy: Don't limit phy addresses by default

Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address fo

net: phy: Don't limit phy addresses by default

Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

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Merge git://git.denx.de/u-boot-sunxi

Move CONFIG_PHY_ADDR to Kconfig

CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example i

Move CONFIG_PHY_ADDR to Kconfig

CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
- edb9315a - CONFIG_PHYLIB is not enabled. Entry is
deleted.

- ds414 - CONFIG_PHYLIB is in incompatible format:
{ 0x1, 0x0 }. This entry is also deleted.

- devkit3250 - The PHY_ADDR is in hex format (0x1F).
Manually CONFIG_PHY_ADDR=31 is added in
the defconfig.

After the changes the suspicious defconfigs passes building.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

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configs: Migrate CONFIG_SYS_TEXT_BASE

On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current
values into the defconfig and removin

configs: Migrate CONFIG_SYS_TEXT_BASE

On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current
values into the defconfig and removing them from the headers.

I did not attempt to add more default values in and for now will leave
that to maintainers.

Signed-off-by: Tom Rini <trini@konsulko.com>

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cmd: Make CONFIG_CMD_FPGA depend on CONFIG_FPGA

cmd/Makefile has:

ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif

which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does

cmd: Make CONFIG_CMD_FPGA depend on CONFIG_FPGA

cmd/Makefile has:

ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif

which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does nothing. Let's remove that Makefile conditional and instead express
this equivalent dependency in Kconfig, so a lot of redundant

# CONFIG_CMD_FPGA is not set

can be removed from board defconfigs that don't actually have an FPGA.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>

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configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: arch-meson: build memory banks using reported memory from registers

As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
and a secondary BL32 firmware.
Since mid-2017, the r

ARM: arch-meson: build memory banks using reported memory from registers

As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was moved
and grown for security reasons.

But mainline U-Boot and Linux has the old address and size fixed.

These SoCs have a register interface to get the two firmware reserved
memory start and sizes.

This patch adds a dynamic reservation of the memory zones in the device tree bootmem
reserved memory zone used by the kernel in early boot.
To be complete, the memory zones are also added to the EFI reserved zones.

Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2].

[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html

Changes since v1:
- switched the #if to if(IS_ENABLED()) to compile all code paths
- renamed function to meson_board_add_reserved_memory()
- added a mem.h header with comment
- updated all boards ft_board_setup()

Changes since RFC v2:
- reduced preprocessor load
- kept Odroid-C2 static memory mapping as exception

Changes since RFC v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[trini: Fix warning on khadas-vim over missing <asm/arch/mem.h>
Signed-off-by: Tom Rini <trini@konsulko.com>

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arm: amlogic: p212: Add support for Ethernet with Internal PHY

This patch adds support for the Internal RMII Ethernet PHY on the
Amlogic P212 Reference Board.

Signed-off-by: Neil Armstrong <narmstr

arm: amlogic: p212: Add support for Ethernet with Internal PHY

This patch adds support for the Internal RMII Ethernet PHY on the
Amlogic P212 Reference Board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

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arm: add initial support for Amlogic P212 based on Meson GXL family

This adds platform code for the Amlogic P212 reference board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.

T

arm: add initial support for Amlogic P212 based on Meson GXL family

This adds platform code for the Amlogic P212 reference board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.

This initial submission only supports UART and MMC/SDCard, support for the
internal Ethernet PHY in Work In Progress.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>

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