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e8f80a5a |
| 09-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borro
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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312a6c01 |
| 20-Mar-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'next'
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4d339a9e |
| 15-Mar-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-video
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e6de55ec |
| 15-Mar-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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88033d73 |
| 14-Mar-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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9f0f432c |
| 14-Mar-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-marvell
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d9a76e77 |
| 04-Mar-2016 |
Vitaly Andrianov <vitalya@ti.com> |
ARM: keystone2: use SPD info to configure K2HK and K2E DDR3 This commit replaces hard-coded EMIF and PHY DDR3 configurations for predefined SODIMMs to a calculated configuration. The SOD
ARM: keystone2: use SPD info to configure K2HK and K2E DDR3 This commit replaces hard-coded EMIF and PHY DDR3 configurations for predefined SODIMMs to a calculated configuration. The SODIMM parameters are read from SODIMM's SPD and used to calculated the configuration. The current commit supports calculation for DDR3 with 1600MHz and 1333MHz only. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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b9cb6482 |
| 02-Mar-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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e1cc4d31 |
| 24-Feb-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'
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1320112c |
| 18-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fdt
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9ec84f10 |
| 17-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-avr32
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a851604c |
| 16-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
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66c98a0c |
| 11-Feb-2015 |
Vitaly Andrianov <vitalya@ti.com> |
keystone2: ddr3: eliminate using global ddr3_size variable KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after r
keystone2: ddr3: eliminate using global ddr3_size variable KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
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2db8c2d6 |
| 07-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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625509ab |
| 05-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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0cf87615 |
| 27-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx
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0ce4af99 |
| 27-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-imx
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5aa7bece |
| 27-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-ti
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89f44bb0 |
| 22-Oct-2014 |
Vitaly Andrianov <vitalya@ti.com> |
keystone2: ecc: add ddr3 error detection and correction support This patch adds the DDR3 ECC support to enable ECC in the DDR3 EMIF controller for Keystone II devices. By defaul
keystone2: ecc: add ddr3 error detection and correction support This patch adds the DDR3 ECC support to enable ECC in the DDR3 EMIF controller for Keystone II devices. By default, ECC will only be enabled if RMW is supported in the DDR EMIF controller. The entire DDR memory will be scrubbed to zero using an EDMA channel after ECC is enabled and before u-boot is re-located to DDR memory. An ecc_test environment variable is added for ECC testing. If ecc_test is set to 0, a detection of 2-bit error will reset the device, if ecc_test is set to 1, 2-bit error detection will not reset the device, user can still boot the kernel to check the ECC error handling in kernel. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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3cc83f9d |
| 07-Oct-2014 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'uboot'
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692c2235 |
| 23-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'misc' of git://git.denx.de/u-boot-x86
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42817eb8 |
| 22-Sep-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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2a8c9c86 |
| 21-Sep-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
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6c343825 |
| 10-Sep-2014 |
Murali Karicheri <m-karicheri2@ti.com> |
ARM: keystone: ddr3: workaround for ddr3a/3b memory issue This patch implements a workaround to fix DDR3 memory issue. The code for workaround detects PGSR0 errors and then preps for
ARM: keystone: ddr3: workaround for ddr3a/3b memory issue This patch implements a workaround to fix DDR3 memory issue. The code for workaround detects PGSR0 errors and then preps for and executes a software-controlled hard reset.In board_early_init, where logic has been added to identify whether or not the previous reset was a PORz. PLL initialization is skipped in the case of a software-controlled hard reset. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Keegan Garcia <kgarcia@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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