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Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07, v2018.03, v2018.01, v2017.11 |
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| #
07d77838 |
| 01-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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| #
1df7f0b6 |
| 30-Jul-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: kconfig: Let board select SPI flash
Only a specific type of SPI flash exists on a board, having board
Kconfig to select the SPI flash seems to make more sense. Other
flash types are not necessa
x86: kconfig: Let board select SPI flash
Only a specific type of SPI flash exists on a board, having board
Kconfig to select the SPI flash seems to make more sense. Other
flash types are not necessary except coreboot, which implies all
available flash drivers there.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
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| #
fda4eb48 |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: link: Add a config for 64-bit U-Boot
Add a new board config which uses 64-bit U-Boot. This is not fully
functional but is it a start. Missing features:
- SDRAM sizing
- Booting linux
- EFI sup
x86: link: Add a config for 64-bit U-Boot
Add a new board config which uses 64-bit U-Boot. This is not fully
functional but is it a start. Missing features:
- SDRAM sizing
- Booting linux
- EFI support
- SCSI device init
(and others)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
19f8b32c |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: link: Add a text base for 64-bit U-Boot
Set up the 64-bit U-Boot text base if building for that target.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Revision tags: v2016.07, openbmc-20160624-1 |
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| #
4edde961 |
| 14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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| #
fa331fad |
| 11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: ivybridge: Do not require HAVE_INTEL_ME
Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.
Signed-off-by: Bin Meng <b
x86: ivybridge: Do not require HAVE_INTEL_ME
Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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| #
789fa275 |
| 25-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove HAVE_ACPI_RESUME
These are currently dead codes. Until we have complete ACPI support,
we don't know if it works or not. Remove to avoid confusion.
Signed-off-by: Bin Meng <bmeng.cn@gmai
x86: Remove HAVE_ACPI_RESUME
These are currently dead codes. Until we have complete ACPI support,
we don't know if it works or not. Remove to avoid confusion.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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d475d590 |
| 25-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove CPU_INTEL_SOCKET_RPGA989
This Kconfig option name indicates it has something to do with cpu
socket, however it is actually not the case. Remove it and move
options inside it to NORTHBRID
x86: Remove CPU_INTEL_SOCKET_RPGA989
This Kconfig option name indicates it has something to do with cpu
socket, however it is actually not the case. Remove it and move
options inside it to NORTHBRIDGE_INTEL_IVYBRIDGE.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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| #
efe2d80c |
| 25-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Clean up ivybridge/chrome Kconfig options
There are some options which are never used, and also some options
which are selected by others but have never been a Kconfg option.
Clean these up.
S
x86: Clean up ivybridge/chrome Kconfig options
There are some options which are never used, and also some options
which are selected by others but have never been a Kconfg option.
Clean these up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1 |
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| #
f448c5d3 |
| 17-Jul-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
605e15db |
| 15-Jul-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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Revision tags: v2015.07 |
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| #
9e3a7c9b |
| 06-Jul-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove MARK_GRAPHICS_MEM_WRCOMB
MARK_GRAPHICS_MEM_WRCOMB is not referenced anywhere in the code,
hence remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromi
x86: Remove MARK_GRAPHICS_MEM_WRCOMB
MARK_GRAPHICS_MEM_WRCOMB is not referenced anywhere in the code,
hence remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2015.07-rc3, v2015.07-rc2, v2015.07-rc1 |
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| #
99556d7d |
| 27-Apr-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Kconfig: Remove deprecated CONFIG_SYS_EXTRA_OPTIONS
Currently all x86 boards still use CONFIG_SYS_EXTRA_OPTIONS to define
the text base address. Since it is deprecated, just remove it and use
C
x86: Kconfig: Remove deprecated CONFIG_SYS_EXTRA_OPTIONS
Currently all x86 boards still use CONFIG_SYS_EXTRA_OPTIONS to define
the text base address. Since it is deprecated, just remove it and use
CONFIG_SYS_TEXT_BASE directly.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3 |
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e1cc4d31 |
| 24-Feb-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'
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Revision tags: v2015.04-rc2 |
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| #
e72d3443 |
| 13-Feb-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
db7a7dee |
| 10-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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Revision tags: v2015.04-rc1 |
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| #
2d934e57 |
| 27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Rename MMCONF_BASE_ADDRESS and make it common across x86
This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive n
x86: Rename MMCONF_BASE_ADDRESS and make it common across x86
This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
5f88ed5c |
| 13-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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Revision tags: v2015.01 |
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| #
24ef0428 |
| 06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Move CONFIG_SYS_CAR_xxx to Kconfig
Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that
we don't need them in the board configuration file thus the same
board configuratoin file
x86: Move CONFIG_SYS_CAR_xxx to Kconfig
Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that
we don't need them in the board configuration file thus the same
board configuratoin file can be used to build both coreboot version
and bare version.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
show more ...
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| #
8cb20ccc |
| 06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
options so that we can remove them from board configurat
x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
options so that we can remove them from board configuration file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
show more ...
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Revision tags: v2015.01-rc4 |
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| #
b9206e61 |
| 15-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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| #
64542f46 |
| 12-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Make ROM_SIZE configurable in Kconfig
Currently the ROM_SIZE is hardcoded to 8MB in arch/x86/Kconfig. This
will not be the case when adding additional board support. Hence we
make ROM_SIZE conf
x86: Make ROM_SIZE configurable in Kconfig
Currently the ROM_SIZE is hardcoded to 8MB in arch/x86/Kconfig. This
will not be the case when adding additional board support. Hence we
make ROM_SIZE configurable (512KB/1MB/2MB/4MB/8MB/16MB) and have the
board Kconfig file select the default ROM_SIZE.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
show more ...
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Revision tags: v2015.01-rc3, v2015.01-rc2 |
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| #
746667f1 |
| 24-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
Conflicts:
arch/x86/cpu/Makefile
Signed-off-by: Tom Rini <trini@ti.com>
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| #
70a09c6c |
| 12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: Implement CAR support (cache as RAM)
Add support for CAR so that we have memory to use prior to DRAM init.
On link there is a total of 128KB of CAR available, although some is
x86: chromebook_link: Implement CAR support (cache as RAM)
Add support for CAR so that we have memory to use prior to DRAM init.
On link there is a total of 128KB of CAR available, although some is
used for the memory reference code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
d1cd0459 |
| 12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Emit post codes in startup code for Chromebooks
On x86 it is common to use 'post codes' which are 8-bit hex values emitted
from the code and visible to the user. Traditionally two 7-segment dis
x86: Emit post codes in startup code for Chromebooks
On x86 it is common to use 'post codes' which are 8-bit hex values emitted
from the code and visible to the user. Traditionally two 7-segment displays
were made available on the motherboard to show the last post code that was
emitted. This allows diagnosis of a boot problem since it is possible to
see where the code got to before it died.
On modern hardware these codes are not normally visible. On Chromebooks
they are displayed by the Embedded Controller (EC), so it is useful to emit
them. We must enable this feature for the EC to see the codes, so add an
option for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
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