Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC

[trini: Add a bunch of m

Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC

[trini: Add a bunch of missing MAINTAINERS entries]
Signed-off-by: Tom Rini <trini@konsulko.com>

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armv8: ls1046ardb: Add TFABOOT support

TFABOOT support includes:
- ls1046ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT

armv8: ls1046ardb: Add TFABOOT support

TFABOOT support includes:
- ls1046ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- FMAN address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>

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Merge branch 'master' of git://git.denx.de/u-boot-samsung

Merge branch 'master' of git://git.denx.de/u-boot-sunxi

Merge tag 'arc-updates-for-2018.09-rc2' of git://git.denx.de/u-boot-arc

That's a set of prety minor changes and fixes for ARC.

Among them:
* Improvement in CREG GPIO driver use

Merge tag 'arc-updates-for-2018.09-rc2' of git://git.denx.de/u-boot-arc

That's a set of prety minor changes and fixes for ARC.

Among them:
* Improvement in CREG GPIO driver used on ARC dev boards
that allow us to re-use the driver for SPI's chip select

* Enable SPI-flsh on AXS10x boards which allows to update
U-Boot binary that gets loaded by boot-ROM

* Fix accommodating always utilized unaligned access by
GCC for ARC starting from 8.1.0

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Merge git://git.denx.de/u-boot-mpc85xx

ls1046ardb: Add qspi_spl variant to the MAINTAINERS file

Signed-off-by: Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-sunxi

Merge git://git.denx.de/u-boot-sunxi

Merge branch 'master' of git://git.denx.de/u-boot-mips

Merge git://git.denx.de/u-boot-fsl-qoriq

arm: ls1046ardb: Add SD secure boot target

- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also includ

arm: ls1046ardb: Add SD secure boot target

- Add SD secure boot target for ls1046ardb.
- Change the u-boot size defined by a macro for copying the main
U-Boot by SPL to also include the u-boot Secure Boot header size
as header is appended to u-boot image. So header will also be
copied from SD to DDR.
- CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM
(128K) where 32K are reserved for use by boot ROM and 6K for the
header.
- Reduce the size of CAAM driver for SPL Blobification functions
and descriptors, that are not required at the time of SPL are
disabled. Further error code conversion to strings is disabled
for SPL build.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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armv8: LS1046ARDB: Add QSPI Secure Boot target

Add QSPI Secure Boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Gar

armv8: LS1046ARDB: Add QSPI Secure Boot target

Add QSPI Secure Boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

trini: Drop local memset() from
examples/standalone/mem_to_mem_idma2intr.c

Signed-off-by: Tom Rini <trini@konsulko.com>

armv8: ls1046ardb: Add LS1046ARDB board support

LS1046ARDB Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 512 Mbyte NAND flash

armv8: ls1046ardb: Add LS1046ARDB board support

LS1046ARDB Specification:
-------------------------
Memory subsystem:
* 8GByte DDR4 SDRAM (64bit bus)
* 512 Mbyte NAND flash
* Two 64 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
* On-board 4G eMMC

Ethernet:
* Two XFI 10G ports
* Two SGMII ports
* Two RGMII ports

PCIe:
* PCIe1 (SerDes2 Lane0) to miniPCIe slot
* PCIe2 (SerDes2 Lane1) to x2 PCIe slot
* PCIe3 (SerDes2 Lane2) to x4 PCIe slot

SATA:
* SerDes2 Lane3 to SATA port

USB 3.0: one super speed USB 3.0 type A port
one Micro-AB port

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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