Merge branch 'iu-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
board/compulab/cm_t35/Makefile
board/corscience/tric

Merge branch 'iu-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
board/compulab/cm_t35/Makefile
board/corscience/tricorder/Makefile
board/ppcag/bg0900/Makefile
drivers/bootcount/Makefile
include/configs/omap4_common.h
include/configs/pdnb3.h

Makefile conflicts are due to additions/removals of
object files on the ARM branch vs KBuild introduction
on the main branch. Resolution consists in adjusting
the list of object files in the main branch version.
This also applies to two files which are not listed
as conflicting but had to be modified:

board/compulab/common/Makefile
board/udoo/Makefile

include/configs/omap4_common.h conflicts are due to
the OMAP4 conversion to ti_armv7_common.h on the ARM
side, and CONFIG_SYS_HZ removal on the main side.
Resolution is to convert as this icludes removal of
CONFIG_SYS_HZ.

include/configs/pdnb3.h is due to a removal on ARM side.
Trivial resolution is to remove the file.

Note: 'git show' will also list two files just because
they are new:

include/configs/am335x_igep0033.h
include/configs/omap3_igep00x0.h

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Merge branch 'master' of git://git.denx.de/u-boot-sh

Merge branch 'master' of git://git.denx.de/u-boot-usb

Merge branch 'master' of git://git.denx.de/u-boot-i2c

powerpc: Fix CamelCase warnings in DDR related code

Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h
has various parameters with embedded acronyms

powerpc: Fix CamelCase warnings in DDR related code

Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h
has various parameters with embedded acronyms capitalized that trigger the CamelCase
warning in checkpatch.pl

Convert those variable names to smallcase naming convention and modify all files
which are using these structures with modified structures.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>

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Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

Conflicts:
spl/Makefile

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Conflicts:
drivers/serial/Makefile

Merge branch 'master' of git://git.denx.de/u-boot-video

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c

Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx

powerpc/b4860qds: Assign DDR address in board file

B4860QDS requires DDRC2 has 0 as base address and DDRC1 has higher address.
This is the requirement for DSP cores to run in 32-bit addr

powerpc/b4860qds: Assign DDR address in board file

B4860QDS requires DDRC2 has 0 as base address and DDRC1 has higher address.
This is the requirement for DSP cores to run in 32-bit address space.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'master' of git://git.denx.de/u-boot-mips

powerpc/b4860qds: Added Support for B4860QDS

B4860QDS is a high-performance computing evaluation, development and
test platform supporting the B4860 QorIQ Power Architecture processor.

powerpc/b4860qds: Added Support for B4860QDS

B4860QDS is a high-performance computing evaluation, development and
test platform supporting the B4860 QorIQ Power Architecture processor.

B4860QDS Overview
------------------
- DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
ECC, 4 GB of memory in two ranks of 2 GB.
- DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 2 GB of memory. Single rank.
- SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point
16x16 switch VSC3316
- SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point
8x8 switch VSC3308
- USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode.
- B4860 UART port is available over USB-to-UART translator USB2SER or over
RS232 flat cable.
- A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper
connectors for Stand-alone mode and to the 1000Base-X over AMC MicroTCA
connector ports 0 and 2 for AMC mode.
- The B4860 configuration may be loaded from nine bits coded reset
configuration reset source. The RCW source is set by appropriate
DIP-switches:
- 16-bit NOR Flash / PROMJet
- QIXIS 8-bit NOR Flash Emulator
- 8-bit NAND Flash
- 24-bit SPI Flash
- Long address I2C EEPROM
- Available debug interfaces are:
- On-board eCWTAP controller with ETH and USB I/F
- JTAG/COP 16-pin header for any external TAP controller
- External JTAG source over AMC to support B2B configuration
- 70-pin Aurora debug connector
- QIXIS (FPGA) logic:
- 2 KB internal memory space including
- IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK,
DDRCLK1, 2 and RTCCLK.
- Two 8T49N222A SerDes ref clock devices support two SerDes port clocks
- total four refclk, including CPRI clock scheme

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

show more ...