Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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53287a89 |
| 10-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
- Enable RTC for Intel Tangier - Wrap the call to 8259 PIC with Kconfig options for old targets without 8259 - Warp the call to USB init with Kconfg options for
Merge git://git.denx.de/u-boot-x86
- Enable RTC for Intel Tangier - Wrap the call to 8259 PIC with Kconfig options for old targets without 8259 - Warp the call to USB init with Kconfg options for coreboot & EFI payload
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da4cfa6b |
| 18-Nov-2018 |
Hannes Schmelzer <oe5hpm@oevsv.at> |
x86: make the LAPIC / IOAPIC construct switchable with Kconfig
There are still systems running which do not have any LAPIC or even IOAPIC. Responsible MSRs for those do not exist and the systems are
x86: make the LAPIC / IOAPIC construct switchable with Kconfig
There are still systems running which do not have any LAPIC or even IOAPIC. Responsible MSRs for those do not exist and the systems are crashing on trying to setup LAPIC.
This commit makes the APIC stuff able to switch off for those boards which dont' have an LAPIC / IOAPIC.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Revision tags: v2018.07 |
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378b29cb |
| 18-Jun-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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4f1dacd4 |
| 12-Jun-2018 |
Bin Meng <bmeng.cn@gmail.com> |
x86: efi: Refactor the directory of EFI app and payload support
At present the EFI application and payload support codes in the x86 directory is distributed in a hybrid way. For example, the Kconfig
x86: efi: Refactor the directory of EFI app and payload support
At present the EFI application and payload support codes in the x86 directory is distributed in a hybrid way. For example, the Kconfig options for both app and payload are in arch/x86/lib/efi/Kconfig, but the source codes in the same directory get built only for CONFIG_EFI_STUB.
This refactors the codes by consolidating all the EFI support codes into arch/x86/cpu/efi, just like other x86 targets.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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66398944 |
| 13-Jun-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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16dde894 |
| 10-Jun-2018 |
Bin Meng <bmeng.cn@gmail.com> |
x86: efi: payload: Enforce toolchain to generate 64-bit EFI payload stub codes
Attempting to use a toolchain that is preconfigured to generate code for the 32-bit architecture (i386), for example, t
x86: efi: payload: Enforce toolchain to generate 64-bit EFI payload stub codes
Attempting to use a toolchain that is preconfigured to generate code for the 32-bit architecture (i386), for example, the i386-linux-gcc toolchain on kernel.org, to compile the 64-bit EFI payload does not build. This updates the makefile fragments to ensure '-m64' is passed to toolchain when building the 64-bit EFI payload stub codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Revision tags: v2018.03, v2018.01, v2017.11 |
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c07f3820 |
| 17-Sep-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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de9ac9a1 |
| 16-Aug-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Add Intel Braswell SoC support
This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset.
Similar to its predecessor BayTrail, there are some work to do to enab
x86: Add Intel Braswell SoC support
This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset.
Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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e71de54a |
| 06-Jul-2017 |
Felipe Balbi <felipe.balbi@linux.intel.com> |
x86: Add Intel Tangier support
Add Intel Tangier SoC support.
Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.
The patch is
x86: Add Intel Tangier support
Add Intel Tangier SoC support.
Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform.
The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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ae1b9399 |
| 17-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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2b2d666f |
| 21-Apr-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: acpi: Add wake up assembly stub
This adds a wake up stub before jumping to OS wake up vector.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by
x86: acpi: Add wake up assembly stub
This adds a wake up stub before jumping to OS wake up vector.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
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d8f25c2a |
| 18-Jan-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Compile irq.c for 64-bit
There is no reason not to compile irq.c for 64-bit.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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4d3ac6c3 |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move setjmp to the i386 directory
This code is only used in 32-bit mode. Move it so that it does not get built with 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bi
x86: Move setjmp to the i386 directory
This code is only used in 32-bit mode. Move it so that it does not get built with 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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8cfc966c |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move call64 to the i386 directory
This code is only used in 32-bit mode. Move it so that it does not get built with 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bi
x86: Move call64 to the i386 directory
This code is only used in 32-bit mode. Move it so that it does not get built with 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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fb355619 |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Don't build cpu files which are not supported on 64-bit
Some files cannot be built with 64-bit and mostly don't make sense in that context. Disable them.
Signed-off-by: Simon Glass <sjg@chromi
x86: Don't build cpu files which are not supported on 64-bit
Some files cannot be built with 64-bit and mostly don't make sense in that context. Disable them.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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23b89d4d |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Don't build call64 and setjmp on 64-bit
These are currently not supported. Calling 64-bit code from 64-bit U-Boot is much simpler, so this code is not needed. setjmp() is not yet implemented fo
x86: Don't build call64 and setjmp on 64-bit
These are currently not supported. Calling 64-bit code from 64-bit U-Boot is much simpler, so this code is not needed. setjmp() is not yet implemented for 64-bit.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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93031595 |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Add cpu code for x86_64
There is not much needed at present, but set up a separate directory to put this code as it grows.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <
x86: Add cpu code for x86_64
There is not much needed at present, but set up a separate directory to put this code as it grows.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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be059e88 |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Move the i386 code into its own directory
Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode.
Signed-off-by: S
x86: Move the i386 code into its own directory
Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it into its own directory and build it only in 32-bit mode.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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dca9220c |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Add 64-bit start-up code
Add code to start up U-Boot in 64-bit mode. It is fairly simple since we are running from RAM and SPL has done the low-level init.
Signed-off-by: Simon Glass <sjg@chro
x86: Add 64-bit start-up code
Add code to start up U-Boot in 64-bit mode. It is fairly simple since we are running from RAM and SPL has done the low-level init.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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972188b3 |
| 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR
Use this new option to control the location of 16-bit init. This will allow us to place this in SPL if needed.
Signed-off-by: Simon Glass <sjg@ch
x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR
Use this new option to control the location of 16-bit init. This will allow us to place this in SPL if needed.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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bb297cee |
| 18-Oct-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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f822403f |
| 17-Oct-2016 |
Simon Glass <sjg@chromium.org> |
x86: Add implementations of setjmp() and longjmp()
Bring in these functions from Linux v4.4. They will be needed for EFI loader support.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: B
x86: Add implementations of setjmp() and longjmp()
Bring in these functions from Linux v4.4. They will be needed for EFI loader support.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Revision tags: v2016.07, openbmc-20160624-1 |
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2f3f477b |
| 11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Add basic support for broadwell
This adds the broadwell architecture, with the CPU driver and some useful header files.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.
x86: Add basic support for broadwell
This adds the broadwell architecture, with the CPU driver and some useful header files.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
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1223d737 |
| 11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Move cache-as-RAM code into a common location
This cache-as-RAM (CAR) code is common to several Intel chips. Create a new intel_common directory and move it in there.
Signed-off-by: Simon Glas
x86: Move cache-as-RAM code into a common location
This cache-as-RAM (CAR) code is common to several Intel chips. Create a new intel_common directory and move it in there.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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