Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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d391c13c |
| 15-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04-rc2
xilinx: - Start to use distro boot commands first - Setup fdtfile on ZynqMP - Move mac add
Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04-rc2
xilinx: - Start to use distro boot commands first - Setup fdtfile on ZynqMP - Move mac addr eeprom read to common location - Convert to OF_SEPARATE - Switch all board to DM_I2C - Some DT syncs
i2c: - Remove !DM_I2C zynq driver
versal: - Enable some more features - Add mini configurations
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4244f2b7 |
| 08-Jan-2019 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
arm64: versal: Add new Kconfig SYS_MEM_RSVD_FOR_MMU
This patch adds new config option which is used for reserving a specific memory for MMU Table and in this case we are using TCM for that purpose.
arm64: versal: Add new Kconfig SYS_MEM_RSVD_FOR_MMU
This patch adds new config option which is used for reserving a specific memory for MMU Table and in this case we are using TCM for that purpose.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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d0423c44 |
| 16-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.11-rc2-v2
FPGA: - Fix SPL fpga loading from FIT
ARM64: - Fix gic accesses in EL2/EL1
Xilinx: - Add dlc20 board support - Add Ver
Merge git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.11-rc2-v2
FPGA: - Fix SPL fpga loading from FIT
ARM64: - Fix gic accesses in EL2/EL1
Xilinx: - Add dlc20 board support - Add Versal board support - Sync defconfigs - Enable MP via Kconfig - Add missing efuse node - Enable CDC for zcu100
cmd: - Fix kgdb Kconfig dependency
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ec48b6c9 |
| 22-Aug-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Sc
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency.
The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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