| fae3798a | 22-Jan-2019 |
Alexey Brodkin <alexey.brodkin@synopsys.com> |
ARC: cache: define CONFIG_SYS_CACHELINE_SIZE as ARCH_DMA_MINALIGN
Even though we don't use CONFIG_SYS_CACHELINE_SIZE in ARC-specific code
it is used a lot in different drivers for alignment purposes
ARC: cache: define CONFIG_SYS_CACHELINE_SIZE as ARCH_DMA_MINALIGN
Even though we don't use CONFIG_SYS_CACHELINE_SIZE in ARC-specific code
it is used a lot in different drivers for alignment purposes.
So we define it and make much more drivers at least compilable for ARC.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| 6e63314f | 11-Oct-2018 |
Alexey Brodkin <alexey.brodkin@synopsys.com> |
ARC: Don't use COMMON section for global not-initialized variables
By default GCC puts global non-initialized variables in COMMON section.
And we used to ignore existence of COMMON section in our li
ARC: Don't use COMMON section for global not-initialized variables
By default GCC puts global non-initialized variables in COMMON section.
And we used to ignore existence of COMMON section in our linker
scripts though smart LD silently appended it right after .bss.
And the problem here is variables from COMMON section even though
require zeroing in run-time were not zeroed as they were placed
right after __bss_end symbol.
It was a pure luck we never faced serious problem due to this,
but now it is fixed.
Now as for some other architectures we'll just force GCC to put
those global variables in normal .bss section.
This solution is much nicer than adding COMMON section to each and
every linker script.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| 5396e8b1 | 24-Jan-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
arc: Add support for IoT development kit
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debug
arc: Add support for IoT development kit
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.
More information is avaialble here [1] and here [2].
The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.
It sports a rich set of I/O including
* DW USB OTG
* DW MobileStorage (used for micro SD-card)
* GPIO
* multiple serial interface including DW APB UART
* ADC, PWM and eFlash, SRAM and SPI Flash memory
* Real-Time Clock (RTC)
* Bluetooth module with worldwide regulatory compliance
(FCC, IC, CE, ETSI, TELEC)
* On-board 9-axis sensor (gyro, accelerometer and compass)
Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.
One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!
[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| c3dcd508 | 02-Oct-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: Add model property to boards .dts
1. This way we sync with Linux kernel where we have model
set for all ARC boards for quite some time, see [1]
2. Once we enable DISPLAY_BOARDINFO for ARC t
ARC: Add model property to boards .dts
1. This way we sync with Linux kernel where we have model
set for all ARC boards for quite some time, see [1]
2. Once we enable DISPLAY_BOARDINFO for ARC this info will
be printed on boot givin some extra data-point about the board
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=618a9cd06dd471ac232f5b27325b24d26eba5571
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| 8f590063 | 29-Jul-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: Enable unaligned access in hardware if compiler uses it
Even if ARC core might handle unaligned access to data this
hardware feature by default is disabled.
But GCC starting from 8.1.0 uncondi
ARC: Enable unaligned access in hardware if compiler uses it
Even if ARC core might handle unaligned access to data this
hardware feature by default is disabled.
But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores.
Which leads to quite strange and fatal run-time failures like the one
below if HW is not configured properly:
| hsdk# sf probe
| Misaligned data access exception @ 0xbff794d4
| ECR: 0x000d0000
| RET: 0xbff794d4
| BLINK: 0xbff79644
| STAT32: 0x00000800
| GP: 0x1003e000 r25: 0xbfd58f08
| BTA: 0xbff794a4 SP: 0xbfd58cd4 FP: 0xbfd58ef0
| LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000
| r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf
| r03: 0x00000000 r04: 0x00000100 r05: 0x00000000
| r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500
| r09: 0x00000000 r10: 0x00200000 r11: 0x00000000
| r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68
| r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000
| r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40
| r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000
| r24: 0xbfd59ba8
| Resetting CPU ...
Now we're checking for __ARC_UNALIGNED__ define emitted by the
compiler if it's going to use unaligned access and then we
force-enable it in hardware too.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| cdfe6913 | 08-Jun-2018 |
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
AXS10x: add spi flash support
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.
Signed-off-by: Eugeniy Paltsev <Eugen
AXS10x: add spi flash support
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| 7af51f12 | 30-May-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: Use elf32-bigarc in case of -EB
As it is stated in LD manual [1] the second entry in OUTPUT_FORMAT
corresponds to "-EB" command-line option which for us is "elf32-bigarc".
[1] https://sourcewa
ARC: Use elf32-bigarc in case of -EB
As it is stated in LD manual [1] the second entry in OUTPUT_FORMAT
corresponds to "-EB" command-line option which for us is "elf32-bigarc".
[1] https://sourceware.org/binutils/docs/ld/Format-Commands.html#Format-Commands
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| eb5c8539 | 30-May-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: Reset: Implement weak reset_cpu()
This will allow for board-specific implementation of reset.
Default version will just stop execution with help of BRK instruction.
Signed-off-by: Alexey Brodk
ARC: Reset: Implement weak reset_cpu()
This will allow for board-specific implementation of reset.
Default version will just stop execution with help of BRK instruction.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| 8f187142 | 30-May-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: Reset: Use __builtin_arc_brk() instead of open-coded ASM
For quite some time we have a GCC's built-in which inserts BRK
instruction so let's use it instead of simple insertion of in-line
assemb
ARC: Reset: Use __builtin_arc_brk() instead of open-coded ASM
For quite some time we have a GCC's built-in which inserts BRK
instruction so let's use it instead of simple insertion of in-line
assembly.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| ef2cd492 | 29-May-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: Move .ivt section to the very beginning of the image
This is useful for cases when U-Boot image is put in ROM and
reset vector points to 0 where the very beginnign of the image reside.
Signed-
ARC: Move .ivt section to the very beginning of the image
This is useful for cases when U-Boot image is put in ROM and
reset vector points to 0 where the very beginnign of the image reside.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|
| ce307128 | 29-May-2018 |
Alexey Brodkin <abrodkin@synopsys.com> |
ARC: Improve relocation fix-ups
We used to have the one and only linker script for all ARC boards
and so we relied on a particular order of symbols there.
Because of that we used __ivt_end as the m
ARC: Improve relocation fix-ups
We used to have the one and only linker script for all ARC boards
and so we relied on a particular order of symbols there.
Because of that we used __ivt_end as the marker of the end of all the
code which won't be true any longer if we move .ivt section to any other
place. That said we'd better check for each section separately.
A couple of other improvements:
1. There's no point to include the marker of section end in interested
range because its address is beyond the section, i.e. we should
compare with "<" but not "<=".
2. .ivt section for ARCv2 cores is just an array of 32-bit ints and
they are not swapped even on little-endia cores while in case of
ARCompact cores .ivt contains valid code so swapping is required.
3. Just in case add check for ARC600 which is also ARCompact
and its .ivt is normal code.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
show more ...
|