Enable support for SMBIOS version 3.0

SMBIOS 3.2 is essentially a superset of SMBIOS 3.0. The changes from
SMBIOS 3.0 to 3.2 added new structures and fields to accommodate more
recent hardware featu

Enable support for SMBIOS version 3.0

SMBIOS 3.2 is essentially a superset of SMBIOS 3.0. The changes from
SMBIOS 3.0 to 3.2 added new structures and fields to accommodate more
recent hardware features and capabilities, but they did not remove or
fundamentally alter any pre-existing structures from 3.0. This means
that:

- SMBIOS 3.2 remains backward-compatible with SMBIOS 3.0. Any software
or system expecting information from SMBIOS 3.0 should still be able
to interpret the data in SMBIOS 3.2 without issues.

Since we already support 3.2, its safe to assume that the code can also
parse the smbios table version 3.0 without any issues. Hence adding 3.0
in the list of supported versions.

Tested By:
Tested this change by sending the SMBIOS 3.0 tables from coreboot to
BMC via IPMI, and the smbios app seems to parse the data successfully
and host the dbus objects of CPU's and DIMM's.

Change-Id: I2af595ed49b7c697abb6d19331470ad17e060836
Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com>

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clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda forma

clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda formatting also changed, so we have made changes to the
organization default style format to better handle lambda formatting.

See I5e08687e696dd240402a2780158664b7113def0e for updated style.
See Iea0776aaa7edd483fa395e23de25ebf5a6288f71 for clang-18 enablement.

Change-Id: I1210c7b95e65a82cc5675ada03441af6727a3930
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Fix MD025 warnings

The following warnings are generated by using markdownlint analysis:
```
README.md:39 MD025/single-title/single-h1 Multiple top-level headings in the same document [Context: "# In

Fix MD025 warnings

The following warnings are generated by using markdownlint analysis:
```
README.md:39 MD025/single-title/single-h1 Multiple top-level headings in the same document [Context: "# Intel CPU Info"]
```
Refer to markdown-lint [1] to fix MD025
[1]: https://github.com/updownpress/markdown-lint/blob/master/rules/025-single-h1.md

Change-Id: Id4d84f33074d467adfcea75180bb9dccc15d9b9c
Signed-off-by: George Liu <liuxiwei@ieisystem.com>

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Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://githu

Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://github.com/codespell-project/codespell

Change-Id: Ifde736cdcf3ccca19b9e65afac69018628a19631
Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com>

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cpuinfo_utils: Change OS state busname and objpath

Change the busname and object path of OS state interface.

This commit relies on the patch below:
[1] https://gerrit.openbmc.org/c/openbmc/x86-powe

cpuinfo_utils: Change OS state busname and objpath

Change the busname and object path of OS state interface.

This commit relies on the patch below:
[1] https://gerrit.openbmc.org/c/openbmc/x86-power-control/+/69589

Change-Id: Ia22fd05bf37364146e323c35c6fdcedf777b4461
Signed-off-by: Potin Lai <potin.lai@quantatw.com>

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meson: Provide wrap file for boost

Currently local build on the system without boost can fail with
the following message:
"""
meson.build: ERROR: Dependency "boost" not found, tried system
"""
Provi

meson: Provide wrap file for boost

Currently local build on the system without boost can fail with
the following message:
"""
meson.build: ERROR: Dependency "boost" not found, tried system
"""
Provide "boost.wrap" file to fix the issue.

Change-Id: I47af3febe4fc95e730d37305ce7d5c9230fb8a72
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>

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Use the new CPUModel enum names from libpeci

libpeci was updated with new CPUModel names, so update uses here to
match.

Change-Id: I60db4ea624bdb8defe3d937cc48fb798e5f49207
Signed-off-by: Jason M.

Use the new CPUModel enum names from libpeci

libpeci was updated with new CPUModel names, so update uses here to
match.

Change-Id: I60db4ea624bdb8defe3d937cc48fb798e5f49207
Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>

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cpuinfoapp: Make PECI features optional

Add a feature flag `cpuinfo-peci` to optionally disable the features in
cpuinfoapp that rely on PECI (PPIN, SST), to support configurations that
want I2C-base

cpuinfoapp: Make PECI features optional

Add a feature flag `cpuinfo-peci` to optionally disable the features in
cpuinfoapp that rely on PECI (PPIN, SST), to support configurations that
want I2C-based SSPEC detection but don't want to use libpeci.

Tested: Disabled `cpuinfo-peci` and verified SSPEC was still written
into the Model property.

Change-Id: Ie3ab9214d9d6ab238a61933de3e3856eca298fa8
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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Add assoc-trim-path option and Board match

When a custom object path is being used (not the default object path
that comes from IPMI), allow the Board interface to be a valid
interface for associati

Add assoc-trim-path option and Board match

When a custom object path is being used (not the default object path
that comes from IPMI), allow the Board interface to be a valid
interface for associating the Inventory object with, not just the
System interface.

The purpose is to support large systems of the blade server style,
which have CPU and DIMM attached to a Board that is itself attached to
a System, not attached to the System directly.

Adding the assoc-trim-path option, disabled by default, to drop the
rightmost path component when setting up this association. This
bypasses the Board and associates the CPU and DIMM directly with the
underlying System.

Cleaning up the systemInfoUpdate() function, to correct a logic error
in which the match rule would not be set up for later if an exception
happened the first time. Also sleeping, to work around a race condition
with Object Mapper.

Tested: I tested it both with and without the assoc-trim-path option,
and it seemed to have the desired effect. With this option enabled, I
was able to attach CPU and DIMM to the proper System, even though there
was a Board object in the hierarchy between them.

Change-Id: Ibb5302e01b9d1b0453bdb14092ede594a9e71415
Signed-off-by: Josh Lehan <krellan@google.com>

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Enable support for SMBIOS version 3.4

As the currently supported 3.5 standard is a superset of 3.4, according
to a glance at the https://www.dmtf.org/standards/smbios spec, enabling
support for 3.4

Enable support for SMBIOS version 3.4

As the currently supported 3.5 standard is a superset of 3.4, according
to a glance at the https://www.dmtf.org/standards/smbios spec, enabling
support for 3.4 should be as straightforward as simply adding it to
this allowlist of supported versions.

This change is inspired by the proposed
https://github.com/openbmc/smbios-mdr/issues/6 which suggests a similar
change for 3.1 version. The only reason I am not adding 3.1 at the same
time here, is that I only have a 3.4 SMBIOS in the machine I am testing
now.

Tested: The SMBIOS from my host is no longer needlessly rejected for
being of 3.4 version.

Change-Id: I29bcb872377c87088b2ed4fc0ec90a03d89c15d8
Signed-off-by: Josh Lehan <krellan@google.com>

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Add effectiveFamily, effectiveModel and Step to AMD Zen family

Reference:
https://kib.kiev.ua/x86docs/AMD/AMD-CPUID-Spec/25481-r2.28.pdf

Change-Id: Ic4df2ab047a561e565ea3c72321d3e0dc42067e4
Signed-

Add effectiveFamily, effectiveModel and Step to AMD Zen family

Reference:
https://kib.kiev.ua/x86docs/AMD/AMD-CPUID-Spec/25481-r2.28.pdf

Change-Id: Ic4df2ab047a561e565ea3c72321d3e0dc42067e4
Signed-off-by: Konda Reddy Kachana <kkachana@google.com>

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Increase timeout to 2-sec for syncing SMBIOS data

MDRv2 (Send Data Set Done) command, sent from bios to BMC
is taking more time in some cases.
The timeout should be 2 sec instead of 0.02 sec.

Teste

Increase timeout to 2-sec for syncing SMBIOS data

MDRv2 (Send Data Set Done) command, sent from bios to BMC
is taking more time in some cases.
The timeout should be 2 sec instead of 0.02 sec.

Tested:
While sending mdr2 command from bios to BMC timeout is not seen.

Change-Id: I6f8a6109ea20f1ca1a1b00d497bd362934f14290
Signed-off-by: Yaswanth Reddy M <yaswanthx.reddy.munukuru@intel.com>

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Clean up some buffer allocations

While investigating some memory corruption, I found two bugs: the
backing store the SMBIOS data gets loaded into was left uninitialized,
and the buffer used for the

Clean up some buffer allocations

While investigating some memory corruption, I found two bugs: the
backing store the SMBIOS data gets loaded into was left uninitialized,
and the buffer used for the version check was allocated using a pointer
where a size should have been used instead.

Tested: While I can not say for sure this solves the corruption, it
seems to make it much less frequent, during my testing. I am not saying
it is gone, but I can no longer reproduce it.

Change-Id: Ic5d28a0d55cfb179c1bd73e95df2a6bf119f6d8c
Signed-off-by: Josh Lehan <krellan@google.com>

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gitignore: Underline nlohmann_json

The nlohmann_json external package uses an underline, not a dash.

Tested: The `git status` listing now hides it, as intended.

Change-Id: Iae5b308fcb1e269b955170e

gitignore: Underline nlohmann_json

The nlohmann_json external package uses an underline, not a dash.

Tested: The `git status` listing now hides it, as intended.

Change-Id: Iae5b308fcb1e269b955170eeb9264145505cb1a3
Signed-off-by: Josh Lehan <krellan@google.com>

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sst: Don't always wake idle CPU

Some parts of SST are important (initial discovery, appliedConfig
change) and should use wake-on-PECI to ensure success even if the CPU is
in an idle PkgC state. Othe

sst: Don't always wake idle CPU

Some parts of SST are important (initial discovery, appliedConfig
change) and should use wake-on-PECI to ensure success even if the CPU is
in an idle PkgC state. Other parts are not important enough to justify
increasing the CPU power draw. Add a WakePolicy parameter to the
SSTInterface infrastructure to use a different policy in different
contexts.

Change-Id: I91435cc0357ab60ca4656e1bc51286e046ae3809
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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Catch PECIErrors from supportsControl()

In future backend where supportsControl() requires a PECI call, make
sure any calls are inside a try/catch so potential errors are handled.

Change-Id: Ib3503

Catch PECIErrors from supportsControl()

In future backend where supportsControl() requires a PECI call, make
sure any calls are inside a try/catch so potential errors are handled.

Change-Id: Ib35030fa4df764a3cccd922099cd76c77823b7c4
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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clang-format: copy latest and re-format

clang-format-17 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest

clang-format: copy latest and re-format

clang-format-17 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest .clang-format from the docs repository and reformat the
repository.

Change-Id: Ib52f953657f0c75fcf0ea191a7eadfbd8b94c917
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Refactor MDRV2 class to allow more than one

Refactored the main MDRV2 class to allow more than one object of this
class to exist at the same time. All hardcoded paths have been made
parameters to th

Refactor MDRV2 class to allow more than one

Refactored the main MDRV2 class to allow more than one object of this
class to exist at the same time. All hardcoded paths have been made
parameters to the constructor, so that they can be varied at runtime as
needed, to avoid overlap.

Also did some necessary internal cleanups to facilitate this.

Tested: Created multiple copies of the MDRV2 object at the same time,
it worked, all appeared on D-Bus, under distinct object paths and
inventory paths. Destructed the MDRV2 object, it disappeared from
D-Bus, constructed it again, it came back.

https://gist.github.com/Krellan/6930bc2ed1ac16b93afcc3a12c02e545

Change-Id: Icd1ebf50086b526cf0cff149eb8ddc59da78f0a9
Signed-off-by: Josh Lehan <krellan@google.com>

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Add CPU functional property

ProcessorSummary in bmcweb always shows disable. Because bmcweb depends
on `xyz.openbmc_project.State.Decorator.OperationalStatus` interface
and `Functional` property to

Add CPU functional property

ProcessorSummary in bmcweb always shows disable. Because bmcweb depends
on `xyz.openbmc_project.State.Decorator.OperationalStatus` interface
and `Functional` property to return CPU functional state.
In this change, include the interface into smbios-mdr and re-add the
property `Functional` removed by smbios-mdr/+/36177

Tested:
```
GET /redfish/v1/Systems/system/
"ProcessorSummary": {
"CoreCount": 112,
"Count": 2,
"Status": {
"Health": "OK",
"HealthRollup": "OK",
"State": "Enabled"
}

busctl introspect xyz.openbmc_project.Smbios.MDR_V2 /xyz/openbmc_project/inventory/system/chassis/motherboard/cpu0
xyz.openbmc_project.State.Decorator.OperationalStatus interface - - -
.Functional property b true emits-change writable
```

Change-Id: I1b4d239ce02d2634a54afb98e4b5e72923fda4fb
Signed-off-by: David Wang <davidwang@quantatw.com>

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Initialize first byte in IPMI cache file

In the IPMI cache file, the first byte of this file was always
essentially random, because it was in a structure that had this field
uninitialized. Fixing it

Initialize first byte in IPMI cache file

In the IPMI cache file, the first byte of this file was always
essentially random, because it was in a structure that had this field
uninitialized. Fixing it, by arbitrarily choosing the value 0x01.

Added a new constant "mdrDirVersion" for this, and also added a similar
constant for "smbiosDirVersion" (which was being initialized, but to a
magic number directly in the code, not a constant).

Tested: Cache files now appear consistently.

Change-Id: I1f13ae973965b1a7105e2ac054ae30c52f45e2a9
Signed-off-by: Josh Lehan <krellan@google.com>

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Entered remaining CPU family text strings

The table of CPU family text strings was incomplete, missing many
entries, of processors both historical and bleeding-edge. Added the
missing entries, as pe

Entered remaining CPU family text strings

The table of CPU family text strings was incomplete, missing many
entries, of processors both historical and bleeding-edge. Added the
missing entries, as per Table 23 of DSP0134 3.7.0 spec.

Following the consistent format of whatever spelling and capitalization
the entry had in the spec, but with the dropping of special marketing
characters like (C), (R), (TM).

Tested: My CPU no longer shows up as "Unknown Processor Family".

Change-Id: I499cb516de27bf4adec7d034030c3d9c19c2c833
Signed-off-by: Josh Lehan <krellan@google.com>

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sst: Initialize OsMailboxCommand status

Static analyzer raised an issue on this unitialized member. It's not an
issue in current usage of the struct, but in theory the success()
function would have

sst: Initialize OsMailboxCommand status

Static analyzer raised an issue on this unitialized member. It's not an
issue in current usage of the struct, but in theory the success()
function would have UB for OsMailboxCommands created with a Throw error
policy.

Change-Id: I16650173add98efecc96535f30c90132481cf231
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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Remove obsolete CMakeLists.txt file

Since the build is now being performed by Meson, remove the obsolete
CMakeLists.txt file.

Change-Id: I9c64ecd7c34899dcdba89ad6d73f608e228e2abc
Signed-off-by: Jos

Remove obsolete CMakeLists.txt file

Since the build is now being performed by Meson, remove the obsolete
CMakeLists.txt file.

Change-Id: I9c64ecd7c34899dcdba89ad6d73f608e228e2abc
Signed-off-by: Josh Lehan <krellan@google.com>

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gitignore: Ignore autogenerated Meson wrap files

Ignoring each autogenerated wrap file individually, to avoid
inadvertently ignoring manually created wrap files.

Although tempting, a general wildca

gitignore: Ignore autogenerated Meson wrap files

Ignoring each autogenerated wrap file individually, to avoid
inadvertently ignoring manually created wrap files.

Although tempting, a general wildcard would not make sense here,
because, in the subprojects directory, there are also some manually
created wrap files mixed in amongst the autogenerated wrap files. (I
wonder why Meson chose to do it this way, since it goes completely
against the overall design of Meson wanting to keep the build dir
separate from the source dir.)

Tested: The directory "git status" now looks clean again.

Change-Id: I01ab21ca96a2ec4e39253e80ca135aab59a51f4d
Signed-off-by: Josh Lehan <krellan@google.com>

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Change MemoryInfo.attributes type to uint8_t

PDI changed the type of `attributes` from uint8_t to size_t.
However the SMBIOS spec only reserved 1 byte for this field.
So we need to keep `attribute`

Change MemoryInfo.attributes type to uint8_t

PDI changed the type of `attributes` from uint8_t to size_t.
However the SMBIOS spec only reserved 1 byte for this field.
So we need to keep `attribute` in 1 byte otherwise the field after
`attribute` will be shifted.

Tested:
Before
.MemorySizeInKB property u 1258291200

After
.MemorySizeInKB property u 33554432

Change-Id: I1e2bfa78d4259c7b86a471ed880f2c5ca923bc66
Signed-off-by: Michael Shen <gpgpgp@google.com>

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