76bc63d7 | 13-Sep-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg: Reset result register after each test
some insns use the result register implicitly as an input. Thus, we could end up with data from the previous insn spilling over.
Signed-off-by: Bast
tests/tcg: Reset result register after each test
some insns use the result register implicitly as an input. Thus, we could end up with data from the previous insn spilling over.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230913105326.40832-4-kbastian@mail.uni-paderborn.de>
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8c3cf3f2 | 13-Sep-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg/tricore: Extended and non-extened regs now match
RSx for d regs and e regs now use the same numbering. This makes sure that mixing d and e registers in an insn test will not overwrite data
tests/tcg/tricore: Extended and non-extened regs now match
RSx for d regs and e regs now use the same numbering. This makes sure that mixing d and e registers in an insn test will not overwrite data between registers.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230913105326.40832-2-kbastian@mail.uni-paderborn.de>
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222ff2d3 | 28-Aug-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
target/tricore: Swap src and dst reg for RCRR_INSERT
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <202308
target/tricore: Swap src and dst reg for RCRR_INSERT
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-10-kbastian@mail.uni-paderborn.de>
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23fa6f56 | 28-Aug-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0
we would crash if width was 0 for these insns, as tcg_gen_deposit() is undefined for that case. For TriCore, width = 0 is a mov from the src
target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0
we would crash if width was 0 for these insns, as tcg_gen_deposit() is undefined for that case. For TriCore, width = 0 is a mov from the src reg to the dst reg, so we special case this here.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-9-kbastian@mail.uni-paderborn.de>
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2b8e2992 | 26-May-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg/tricore: Uses label for memory addresses
the linker might rearrange sections, so lets reference memory by label name instead of addr + off.
Signed-off-by: Bastian Koppelmann <kbastian@mai
tests/tcg/tricore: Uses label for memory addresses
the linker might rearrange sections, so lets reference memory by label name instead of addr + off.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230526061946.54514-3-kbastian@mail.uni-paderborn.de>
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6e34f54d | 03-Feb-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg/tricore: Add test for ld.h
this exercises the error reported in https://gitlab.com/qemu-project/qemu/-/issues/652.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Messa
tests/tcg/tricore: Add test for ld.h
this exercises the error reported in https://gitlab.com/qemu-project/qemu/-/issues/652.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230203132132.511254-1-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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7ebe4cb3 | 02-Feb-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg/tricore: Add OPC2_32_RRRR_DEXTR tests
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-9-kbastian@mail.uni-paderborn.de> Signed-off-by: B
tests/tcg/tricore: Add OPC2_32_RRRR_DEXTR tests
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-9-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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fa581531 | 02-Feb-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg/tricore: Add test for OPC2_32_RCRW_INSERT
DREG_RS2 and DREG_CALC_RESULT were mapped to the same register which would not trigger https://gitlab.com/qemu-project/qemu/-/issues/653. So let's
tests/tcg/tricore: Add test for OPC2_32_RCRW_INSERT
DREG_RS2 and DREG_CALC_RESULT were mapped to the same register which would not trigger https://gitlab.com/qemu-project/qemu/-/issues/653. So let's make each register unique.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-5-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
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a1ff17fe | 12-May-2021 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg/tricore: Add muls test
Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org
tests/tcg/tricore: Add muls test
Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210305170045.869437-16-kbastian@mail.uni-paderborn.de> Message-Id: <20210512102051.12134-26-alex.bennee@linaro.org>
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0429e095 | 12-May-2021 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
tests/tcg/tricore: Add msub test
Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org
tests/tcg/tricore: Add msub test
Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210305170045.869437-15-kbastian@mail.uni-paderborn.de> Message-Id: <20210512102051.12134-25-alex.bennee@linaro.org>
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