Merge remote-tracking branch 'remotes/artyom/tags/pull-sun4v-20170226' into staging

Pull request for Niagara patches 2017 02 26

# gpg: Signature made Sun 26 Feb 2017 21:56:06 GMT

Merge remote-tracking branch 'remotes/artyom/tags/pull-sun4v-20170226' into staging

Pull request for Niagara patches 2017 02 26

# gpg: Signature made Sun 26 Feb 2017 21:56:06 GMT
# gpg: using RSA key 0x3360C3F7411A125F
# gpg: Good signature from "Artyom Tarasenko <atar4qemu@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2AD8 6149 17F4 B2D7 05C0 BB12 3360 C3F7 411A 125F

* remotes/artyom/tags/pull-sun4v-20170226:
niagara: check if a serial port is available
niagara: fail if a firmware file is missing

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/rth/tags/pull-or-20170214' into staging

Queued openrisc patches

# gpg: Signature made Mon 13 Feb 2017 21:21:03 GMT
# gpg: us

Merge remote-tracking branch 'remotes/rth/tags/pull-or-20170214' into staging

Queued openrisc patches

# gpg: Signature made Mon 13 Feb 2017 21:21:03 GMT
# gpg: using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-or-20170214: (24 commits)
target/openrisc: Optimize for r0 being zero
target/openrisc: Tidy handling of delayed branches
target/openrisc: Tidy ppc/npc implementation
target/openrisc: Optimize l.jal to next
target/openrisc: Fix madd
target/openrisc: Implement muld, muldu, macu, msbu
target/openrisc: Represent MACHI:MACLO as a single unit
target/openrisc: Implement msync
target/openrisc: Enable trap, csync, msync, psync for user mode
target/openrisc: Set flags on helpers
target/openrisc: Use movcond where appropriate
target/openrisc: Keep SR_CY and SR_OV in a separate variables
target/openrisc: Keep SR_F in a separate variable
target/openrisc: Invert the decoding in dec_calc
target/openrisc: Put SR[OVE] in TB flags
target/openrisc: Streamline arithmetic and OVE
target/openrisc: Rationalize immediate extraction
target/openrisc: Tidy insn dumping
target/openrisc: Implement lwa, swa
target/openrisc: Fix exception handling status registers
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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target/openrisc: Rename the cpu from or32 to or1k

This is in keeping with the toolchain and or1ksim.

Signed-off-by: Richard Henderson <rth@twiddle.net>

Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu

* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu:
target-i386: move tcg initialization into x86_cpu_initfn()

Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu

* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu:
target-i386: move tcg initialization into x86_cpu_initfn()
cleanup cpu_set_debug_excp_handler
target-xtensa: drop usage of prev_debug_excp_handler
target-i386: drop usage of prev_debug_excp_handler

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Merge remote-tracking branch 'bonzini/nbd-next' into staging

* bonzini/nbd-next:
qemu-nbd: add --cache and --aio options
qemu-nbd: reorganize help message

Merge remote-tracking branch 'bonzini/scsi-next' into staging

* bonzini/scsi-next: (32 commits)
virtio-scsi: enable MSI-X support
virtio-scsi: add ioeventfd support
virtio-

Merge remote-tracking branch 'bonzini/scsi-next' into staging

* bonzini/scsi-next: (32 commits)
virtio-scsi: enable MSI-X support
virtio-scsi: add ioeventfd support
virtio-scsi: report parameter change events
virtio-scsi: do not report dropped events after reset
virtio-scsi: Report missed events
virtio-scsi: Implement hotplug support for virtio-scsi
scsi: report parameter changes to HBA drivers
scsi-disk: report resized disk via sense codes
scsi: establish precedence levels for unit attention
scsi: introduce hotplug() and hot_unplug() interfaces for SCSI bus
scsi: add tracepoint for scsi_req_cancel
scsi-disk: removable hard disks support load/eject
scsi-disk: Fail medium writes with proper sense for readonly LUNs
scsi-disk: improve the lba-out-of-range tests for read/write/verify
scsi-disk: rd/wr/vr-protect !=0 is an error
scsi-disk: support toggling the write cache
scsi-disk: parse MODE SELECT commands and parameters
scsi-disk: fix changeable values for MODE_PAGE_R_W_ERROR
scsi-disk: adjust offsets in MODE SENSE by 2
scsi-disk: support emulated TO_DEV requests
...

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Merge commit 'quintela/migration-next-v5' into staging

* commit '6c779f22a93cc6e4565b940ef616e3efc5b50ba5':
Change ram_save_block to return -1 if there are no more changes
ram: s

Merge commit 'quintela/migration-next-v5' into staging

* commit '6c779f22a93cc6e4565b940ef616e3efc5b50ba5':
Change ram_save_block to return -1 if there are no more changes
ram: save_live_setup() we don't need to synchronize the dirty bitmap.
ram: iterate phase
ram: save_live_complete() only do one loop
ram: save_live_setup() don't need to sent pages
savevm: split save_live into stage2 and stage3
savevm: split save_live_setup from save_live_state
savevm: introduce is_active method
savevm: Refactor cancel operation in its own operation
savevm: remove SaveLiveStateHandler
savevm: remove SaveSetParamsHandler
savevm: Live migration handlers register the struct directly
savevm: Use a struct to pass all handlers

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Merge branch pci into master

Merge master and pci branch, resolve build breakage in hw/esp.c
introduced by f90c2bcd.

Conflicts:
hw/esp.c

target-or32: Add testcases

Add testcases for OpenRISC.

Signed-off-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>