7ecdacc5 | 05-Mar-2019 |
Aleksandar Markovic <amarkovic@wavecomp.com> |
tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions
Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU, MUHU, DMUL, DMUH, DMULU, and DMUHU.
MUH and MUHU requi
tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions
Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU, MUHU, DMUL, DMUH, DMULU, and DMUHU.
MUH and MUHU require 64 bit inputs in the form of 64-bit sign-extended 32-bit inputs.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-14-git-send-email-aleksandar.markovic@rt-rk.com>
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09a1bc75 | 05-Mar-2019 |
Aleksandar Markovic <amarkovic@wavecomp.com> |
tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions
Add tests for MIPS64R6 shift instructions: SLLV, SRLV, SRAV, DSLLV, DSRLV, and DSRAV.
Signed-off-by: Aleksandar Markovic <amarkovic
tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions
Add tests for MIPS64R6 shift instructions: SLLV, SRLV, SRAV, DSLLV, DSRLV, and DSRAV.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-13-git-send-email-aleksandar.markovic@rt-rk.com>
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9dea2df8 | 05-Mar-2019 |
Aleksandar Markovic <amarkovic@wavecomp.com> |
tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions
Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp
tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions
Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-12-git-send-email-aleksandar.markovic@rt-rk.com>
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8708c32a | 05-Mar-2019 |
Aleksandar Markovic <amarkovic@wavecomp.com> |
tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions
Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions
Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-11-git-send-email-aleksandar.markovic@rt-rk.com>
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