ee53f8a6 | 30-Mar-2023 |
Joe Komlodi <komlodi@google.com> |
qtest: remote_i3c: Add remote I3C qtest
This adds a remote I3C qtest using the Aspeed I3C controller and an AST2600 board.
The qtest uses a basic Aspeed I3C driver to test: - data transmission from
qtest: remote_i3c: Add remote I3C qtest
This adds a remote I3C qtest using the Aspeed I3C controller and an AST2600 board.
The qtest uses a basic Aspeed I3C driver to test: - data transmission from controller to target - data reception from target to controller - target sending an IBI (with data bytes) to controller
Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Patrick Venture <venture@google.com>
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50183a32 | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/ast2700-smc-test: Support to test AST2700
Add test_ast2700_evb function and reused testcases which are from aspeed_smc-test.c for AST2700 testing. The base address, flash base address and
test/qtest/ast2700-smc-test: Support to test AST2700
Add test_ast2700_evb function and reused testcases which are from aspeed_smc-test.c for AST2700 testing. The base address, flash base address and ce index of fmc_cs0 are 0x14000000, 0x100000000 and 0, respectively. The default flash model of fmc_cs0 is "w25q01jvq" whose size is 128MB, so set jedec_id 0xef4021.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
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11d94251 | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest: Introduce a new aspeed-smc-utils.c to place common testcases
The testcases for ASPEED SMC model were placed in aspeed_smc-test.c. However, this test file only supports for ARM32. To supp
test/qtest: Introduce a new aspeed-smc-utils.c to place common testcases
The testcases for ASPEED SMC model were placed in aspeed_smc-test.c. However, this test file only supports for ARM32. To support all ASPEED SOCs such as AST2700 whose CPU architecture is aarch64, introduces a new aspeed-smc-utils source file and move all common APIs and testcases from aspeed_smc-test.c to aspeed-smc-utils.c.
Finally, users are able to re-used these testcase for AST2700 and future ASPEED SOCs testing.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
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08acaf15 | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Support write page command with QPI mode
Add a new testcase for write page command with QPI mode testing. Currently, only run this testcase for AST2500, AST2600 and AST10
test/qtest/aspeed_smc-test: Support write page command with QPI mode
Add a new testcase for write page command with QPI mode testing. Currently, only run this testcase for AST2500, AST2600 and AST1030.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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5dd6a411 | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Support to test AST1030
Add test_ast1030_evb function and reused testcases for AST1030 testing. The base address, flash base address and ce index of fmc_cs0 are 0x7E62000
test/qtest/aspeed_smc-test: Support to test AST1030
Add test_ast1030_evb function and reused testcases for AST1030 testing. The base address, flash base address and ce index of fmc_cs0 are 0x7E620000, 0x80000000 and 0, respectively. The default flash model of fmc_cs0 is "w25q80bl" whose size is 1MB, so set jedec_id 0xef4014.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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cc12c741 | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Support to test AST2600
Add test_ast2600_evb function and reused testcases for AST2600 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E6
test/qtest/aspeed_smc-test: Support to test AST2600
Add test_ast2600_evb function and reused testcases for AST2600 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E620000, 0x20000000 and 0, respectively. The default flash model of fmc_cs0 is "mx66u51235f" whose size is 64MB, so set jedec_id 0xc2253a.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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7976419e | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Support to test AST2500
Add test_ast2500_evb function and reused testcases for AST2500 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E6
test/qtest/aspeed_smc-test: Support to test AST2500
Add test_ast2500_evb function and reused testcases for AST2500 testing. The spi base address, flash base address and ce index of fmc_cs0 are 0x1E620000, 0x20000000 and 0, respectively. The default flash model of fmc_cs0 is "mx25l25635e" whose size is 32MB, so set jedec_id 0xc22019.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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cbda6d51 | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Introducing a "page_addr" data field
Currently, these test cases used the hardcode offset 0x1400000 (0x14000 * 256) which was beyond the 16MB flash size for flash page re
test/qtest/aspeed_smc-test: Introducing a "page_addr" data field
Currently, these test cases used the hardcode offset 0x1400000 (0x14000 * 256) which was beyond the 16MB flash size for flash page read/write command testing. However, the default fmc flash model of ast1030-a1 EVB is "w25q80bl" whose size is 1MB. To test SoC flash models, introduces a new page_addr member in TestData structure, so users can set the offset for flash page read/write command testing.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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41016b6a | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Support to test all CE pins
Currently, these test cases only support to test CE0. To test all CE pins, introduces new ce and node members in TestData structure. The ce me
test/qtest/aspeed_smc-test: Support to test all CE pins
Currently, these test cases only support to test CE0. To test all CE pins, introduces new ce and node members in TestData structure. The ce member is used for saving the ce index and node member is used for saving the node path, respectively.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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57484365 | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs
Currently, these test cases are only used for testing fmc_cs0 for AST2400. To test others BMC SOCs, introduces a new T
test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs
Currently, these test cases are only used for testing fmc_cs0 for AST2400. To test others BMC SOCs, introduces a new TestData structure. Users can set the spi base address, flash base address, jedesc id and so on for different BMC SOCs and flash model testing.
Introduce new helper functions to make the test case more readable.
Set spi base address 0x1E620000, flash_base address 0x20000000 and jedec id 0x20ba19 for fmc_cs0 with n25q256a flash for AST2400 SMC model testing.
To pass the TestData into the test case, replace qtest_add_func with qtest_add_data_func.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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8d5134cc | 27-Nov-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function
So far, the test cases are used for testing SMC model with AST2400 BMC. However, AST2400 is end off live and ASPEED is no lon
test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function
So far, the test cases are used for testing SMC model with AST2400 BMC. However, AST2400 is end off live and ASPEED is no longer support this SOC. To test SMC model for AST2500, AST2600 and AST1030, move the test cases from main to test_palmetto_bmc function.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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d65c890a | 29-Nov-2024 |
Daniel P. Berrangé <berrange@redhat.com> |
tests/qtest: add test for querying balloon guest stats
This test would have identified the crash caused by the addition of new balloon stats fields.
Signed-off-by: Daniel P. Berrangé <berrange@redh
tests/qtest: add test for querying balloon guest stats
This test would have identified the crash caused by the addition of new balloon stats fields.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20241129135507.699030-4-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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84604595 | 29-Nov-2024 |
Daniel P. Berrangé <berrange@redhat.com> |
tests/qtest: drop 'fuzz-' prefix from virtio-balloon test
This test file is expected to be extended for arbitrary virtio-balloon related tests, not merely those discovered by fuzzing.
Signed-off-by
tests/qtest: drop 'fuzz-' prefix from virtio-balloon test
This test file is expected to be extended for arbitrary virtio-balloon related tests, not merely those discovered by fuzzing.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20241129135507.699030-3-berrange@redhat.com> [PMD: Update MAINTAINERS] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com>
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eaab44cc | 24-Nov-2024 |
Christian Schoenebeck <qemu_oss@crudebyte.com> |
tests/9p: also check 'Tgetattr' in 'use-after-unlink' test
This verifies expected behaviour of previous bug fix patch.
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Gre
tests/9p: also check 'Tgetattr' in 'use-after-unlink' test
This verifies expected behaviour of previous bug fix patch.
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <7017658155c517b9665b75333a97c79aa2d4f3df.1732465720.git.qemu_oss@crudebyte.com>
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4ec98496 | 24-Nov-2024 |
Christian Schoenebeck <qemu_oss@crudebyte.com> |
tests/9p: add missing Rgetattr response name
'Tgetattr' 9p request and its 'Rgetattr' response types are already used by test client, however this response type is yet missing in function rmessage_n
tests/9p: add missing Rgetattr response name
'Tgetattr' 9p request and its 'Rgetattr' response types are already used by test client, however this response type is yet missing in function rmessage_name(), so add it.
Fixes: a6821b828404 ("tests/9pfs: compare QIDs in fs_walk_none() test") Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <e183da80d390cfd7d55bdbce92f0ff6e3e5cdced.1732465720.git.qemu_oss@crudebyte.com>
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abf0f092 | 24-Nov-2024 |
Christian Schoenebeck <qemu_oss@crudebyte.com> |
tests/9p: fix Rreaddir response name
All 9p response types are prefixed with an "R", therefore fix "READDIR" -> "RREADDIR" in function rmessage_name().
Fixes: 4829469fd9ff ("tests/virtio-9p: added
tests/9p: fix Rreaddir response name
All 9p response types are prefixed with an "R", therefore fix "READDIR" -> "RREADDIR" in function rmessage_name().
Fixes: 4829469fd9ff ("tests/virtio-9p: added readdir test") Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <daad7af58b403aaa2487c566032beca36664b30e.1732465720.git.qemu_oss@crudebyte.com>
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462db8fb | 21-Feb-2024 |
Christian Schoenebeck <qemu_oss@crudebyte.com> |
tests/9p: add 'use-after-unlink' test
After removing a file from the file system, we should still be able to work with the file if we already had it open before removal.
As a first step we verify t
tests/9p: add 'use-after-unlink' test
After removing a file from the file system, we should still be able to work with the file if we already had it open before removal.
As a first step we verify that it is possible to write to an unlinked file, as this is what already works. This test is extended later on after having fixed other use cases after unlink that are not working yet.
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <3d6449d4df25bcdd3e807eff169f46f1385e5257.1732465720.git.qemu_oss@crudebyte.com>
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5d525294 | 07-Nov-2024 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
bios-tables-test: Add data for complex numa test (GI, GP etc)
Given this is a new configuration, there are affects on APIC, CEDT and DSDT, but the key elements are in SRAT (plus related data in HMAT
bios-tables-test: Add data for complex numa test (GI, GP etc)
Given this is a new configuration, there are affects on APIC, CEDT and DSDT, but the key elements are in SRAT (plus related data in HMAT). The configuration has node to exercise many different combinations.
0) CPUs + Memory 1) GI only 2) GP only 3) CPUS only 4) Memory only 5) CPUs + HP memory
GI node, GP Node, Memory only node, hotplug memory only node, latency and bandwidth such that in Linux Access0 (any initiator) and Access1 (CPU initiators only) given different answers. Following cropped to remove details of each entry.
[000h 0000 004h] Signature : "SRAT" [System Resource Affinity Table] ... [030h 0048 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] ... [032h 0050 001h] Proximity Domain Low(8) : 00 [033h 0051 001h] Apic ID : 00 ... [040h 0064 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] ... [042h 0066 001h] Proximity Domain Low(8) : 03 [043h 0067 001h] Apic ID : 01 ... [050h 0080 001h] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] ... [052h 0082 001h] Proximity Domain Low(8) : 05 [053h 0083 001h] Apic ID : 02 ... [060h 0096 001h] Subtable Type : 01 [Memory Affinity] ... [062h 0098 004h] Proximity Domain : 00000000 ... [068h 0104 008h] Base Address : 0000000000000000 [070h 0112 008h] Address Length : 00000000000A0000 ... [088h 0136 001h] Subtable Type : 01 [Memory Affinity] ... [08Ah 0138 004h] Proximity Domain : 00000000 ... [090h 0144 008h] Base Address : 0000000000100000 [098h 0152 008h] Address Length : 0000000003F00000 ... [0B0h 0176 001h] Subtable Type : 01 [Memory Affinity] ... [0B2h 0178 004h] Proximity Domain : 00000004 ... [0B8h 0184 008h] Base Address : 0000000004000000 [0C0h 0192 008h] Address Length : 0000000004000000 ... some zero length entries follow...
[1A0h 0416 001h] Subtable Type : 05 [Generic Initiator Affinity] [1A1h 0417 001h] Length : 20
[1A2h 0418 001h] Reserved1 : 00 [1A3h 0419 001h] Device Handle Type : 01 [1A4h 0420 004h] Proximity Domain : 00000001 [1A8h 0424 010h] Device Handle : 00 00 01 02 00 00 00 00 00 00 00 00 00 00 00 00 [1B8h 0440 004h] Flags (decoded below) : 00000001 Enabled : 1 Architectural Transactions : 0 [1BCh 0444 004h] Reserved2 : 00000000
[1C0h 0448 001h] Subtable Type : 06 [Generic Port Affinity] [1C1h 0449 001h] Length : 20
[1C2h 0450 001h] Reserved1 : 00 [1C3h 0451 001h] Device Handle Type : 00 [1C4h 0452 004h] Proximity Domain : 00000002 [1C8h 0456 010h] Device Handle : 41 43 50 49 30 30 31 36 40 00 00 00 00 00 00 00 [1D8h 0472 004h] Flags (decoded below) : 00000001 Enabled : 1 Architectural Transactions : 0 [1DCh 0476 004h] Reserved2 : 00000000
[1E0h 0480 001h] Subtable Type : 01 [Memory Affinity] ... [1E2h 0482 004h] Proximity Domain : 00000005 ... [1E8h 0488 008h] Base Address : 0000000100000000 [1F0h 0496 008h] Address Length : 0000000090000000
Example block from HMAT: [0F0h 0240 002h] Structure Type : 0001 [System Locality Latency and Bandwidth Information] [0F2h 0242 002h] Reserved : 0000 [0F4h 0244 004h] Length : 00000078 [0F8h 0248 001h] Flags (decoded below) : 00 Memory Hierarchy : 0 Use Minimum Transfer Size : 0 Non-sequential Transfers : 0 [0F9h 0249 001h] Data Type : 03 [0FAh 0250 001h] Minimum Transfer Size : 00 [0FBh 0251 001h] Reserved1 : 00 [0FCh 0252 004h] Initiator Proximity Domains # : 00000004 [100h 0256 004h] Target Proximity Domains # : 00000006 [104h 0260 004h] Reserved2 : 00000000 [108h 0264 008h] Entry Base Unit : 0000000000000004 [110h 0272 004h] Initiator Proximity Domain List : 00000000 [114h 0276 004h] Initiator Proximity Domain List : 00000001 [118h 0280 004h] Initiator Proximity Domain List : 00000003 [11Ch 0284 004h] Initiator Proximity Domain List : 00000005 [120h 0288 004h] Target Proximity Domain List : 00000000 [124h 0292 004h] Target Proximity Domain List : 00000001 [128h 0296 004h] Target Proximity Domain List : 00000002 [12Ch 0300 004h] Target Proximity Domain List : 00000003 [130h 0304 004h] Target Proximity Domain List : 00000004 [134h 0308 004h] Target Proximity Domain List : 00000005 [138h 0312 002h] Entry : 00C8 [13Ah 0314 002h] Entry : 0000 [13Ch 0316 002h] Entry : 0032 [13Eh 0318 002h] Entry : 0000 [140h 0320 002h] Entry : 0032 [142h 0322 002h] Entry : 0064 [144h 0324 002h] Entry : 0019 [146h 0326 002h] Entry : 0000 [148h 0328 002h] Entry : 0064 [14Ah 0330 002h] Entry : 0000 [14Ch 0332 002h] Entry : 00C8 [14Eh 0334 002h] Entry : 0019 [150h 0336 002h] Entry : 0064 [152h 0338 002h] Entry : 0000 [154h 0340 002h] Entry : 0032 [156h 0342 002h] Entry : 0000 [158h 0344 002h] Entry : 0032 [15Ah 0346 002h] Entry : 0064 [15Ch 0348 002h] Entry : 0064 [15Eh 0350 002h] Entry : 0000 [160h 0352 002h] Entry : 0032 [162h 0354 002h] Entry : 0000 [164h 0356 002h] Entry : 0032 [166h 0358 002h] Entry : 00C8
Note the zeros represent entries where the target node has no memory. These could be surpressed but it isn't 'wrong' to provide them and it is (probably) permissible under ACPI to hotplug memory into these nodes later.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20241107123446.902801-6-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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18afed74 | 07-Nov-2024 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
bios-tables-test: Add complex SRAT / HMAT test for GI GP
Add a test with 6 nodes to exercise most interesting corner cases of SRAT and HMAT generation including the new Generic Initiator and Generic
bios-tables-test: Add complex SRAT / HMAT test for GI GP
Add a test with 6 nodes to exercise most interesting corner cases of SRAT and HMAT generation including the new Generic Initiator and Generic Port Affinity structures. More details of the set up in the following patch adding the table data.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-5-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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2cb74093 | 07-Nov-2024 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
bios-tables-test: Allow for new acpihmat-generic-x test data.
The test to be added exercises many corner cases of the SRAT and HMAT table generation.
Signed-off-by: Jonathan Cameron <Jonathan.Camer
bios-tables-test: Allow for new acpihmat-generic-x test data.
The test to be added exercises many corner cases of the SRAT and HMAT table generation.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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e50a24ea | 12-Nov-2024 |
Igor Mammedov <imammedo@redhat.com> |
tests/acpi: update expected blobs
Expected AML return to the state before bf1ecc8dad606 (w/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states) droping not needed CPRS and _STA logic
tests/acpi: update expected blobs
Expected AML return to the state before bf1ecc8dad606 (w/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states) droping not needed CPRS and _STA logic that broke cpu hotplug
@@ -2887,7 +2887,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) CRMV, 1, CEJ0, 1, CEJF, 1, - CPRS, 1, Offset (0x05), CCMD, 8 } @@ -2922,16 +2921,9 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) \_SB.PCI0.PRES.CSEL = Arg0 Local0 = Zero - If ((\_SB.PCI0.PRES.CPRS == One)) + If ((\_SB.PCI0.PRES.CPEN == One)) { - If ((\_SB.PCI0.PRES.CPEN == One)) - { - Local0 = 0x0F - } - Else - { - Local0 = 0x0D - } + Local0 = 0x0F }
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241112170258.2996640-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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ef5e7aea | 12-Nov-2024 |
Salil Mehta <salil.mehta@huawei.com> |
qtest: allow ACPI DSDT Table changes
list changed files in tests/qtest/bios-tables-test-allowed-diff.h
Message-ID: <20241106100047.18901c9d@imammedo.users.ipa.redhat.com> Signed-off-by: Salil Mehta
qtest: allow ACPI DSDT Table changes
list changed files in tests/qtest/bios-tables-test-allowed-diff.h
Message-ID: <20241106100047.18901c9d@imammedo.users.ipa.redhat.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241112170258.2996640-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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b0a10091 | 19-Nov-2024 |
Roque Arcudia Hernandez <roqueh@google.com> |
tests/qtest/cmsdk-apb-watchdog-test: Test INTEN as counter enable
The following tests focus on making sure the counter is not running out of reset and the proper use of INTEN as the counter enable.
tests/qtest/cmsdk-apb-watchdog-test: Test INTEN as counter enable
The following tests focus on making sure the counter is not running out of reset and the proper use of INTEN as the counter enable. As described in:
https://developer.arm.com/documentation/ddi0479/d/apb-components/apb-watchdog/programmers-model
The new tests have to target an MPS2 machine because the original machine used by the test (stellaris) has a variation of the cmsdk_apb_watchdog that locks INTEN when it is programmed to 1. The stellaris machine also does not reproduce the problem of the counter running out of cold reset due to the way the clocks are initialized.
Signed-off-by: Roque Arcudia Hernandez <roqueh@google.com> Reviewed-by: Stephen Longfield <slongfield@google.com> Message-id: 20241115160328.1650269-6-roqueh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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9a0762c1 | 19-Nov-2024 |
Roque Arcudia Hernandez <roqueh@google.com> |
tests/qtest/cmsdk-apb-watchdog-test: Don't abort on assertion failure
Currently the watchdog test has a behavior in which the first test assertion that fails will make the test abort making it impos
tests/qtest/cmsdk-apb-watchdog-test: Don't abort on assertion failure
Currently the watchdog test has a behavior in which the first test assertion that fails will make the test abort making it impossible to see the result of other tests:
# ERROR:../tests/qtest/cmsdk-apb-watchdog-test.c:87:test_watchdog: assertion failed ... Bail out! Aborted
Changing the behavior in order to let the test finish other tests and report the ones that pass and fail:
# ERROR:../tests/qtest/cmsdk-apb-watchdog-test.c:101:test_watchdog: assertion failed ... not ok 1 /arm/cmsdk-apb-watchdog/watchdog
Signed-off-by: Roque Arcudia Hernandez <roqueh@google.com> Message-id: 20241115160328.1650269-5-roqueh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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583c9884 | 19-Nov-2024 |
Roque Arcudia Hernandez <roqueh@google.com> |
tests/qtest/cmsdk-apb-watchdog-test: Parameterize tests
Currently the CMSDK APB watchdog tests target an specialized version of the device (luminaris using the lm3s811evb machine) that prevents the
tests/qtest/cmsdk-apb-watchdog-test: Parameterize tests
Currently the CMSDK APB watchdog tests target an specialized version of the device (luminaris using the lm3s811evb machine) that prevents the development of tests for the more generic device documented in:
https://developer.arm.com/documentation/ddi0479/d/apb-components/apb-watchdog/programmers-model
This patch allows the execution of the watchdog tests in an MPS2 machine (when applicable) which uses the generic version of the CMSDK APB watchdog.
Finally the rules for compiling the test have to change because it is possible not to have CONFIG_STELLARIS (required for the lm3s811evb machine) while still having CONFIG_CMSDK_APB_WATCHDOG and the test will fail. Due to the addition of the MPS2 machine CONFIG_MPS2 becomes also a dependency for the test compilation.
Signed-off-by: Roque Arcudia Hernandez <roqueh@google.com> Reviewed-by: Stephen Longfield <slongfield@google.com> Message-id: 20241115160328.1650269-4-roqueh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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