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5acc270a |
| 25-Jun-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into staging target/xtensa fixes for 5.1: - fix access to special registers missing in the core configuration;
Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into staging target/xtensa fixes for 5.1: - fix access to special registers missing in the core configuration; - fix simcall opcode behavior for new hardware; - drop gen_io_end call from xtensa translator. # gpg: Signature made Thu 25 Jun 2020 09:08:58 BST # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20200625-xtensa: target/xtensa: drop gen_io_end call target/xtensa: fix simcall for newer hardware target/xtensa: fetch HW version from configuration overlay target/xtensa: work around missing SR definitions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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49ee1155 |
| 08-Jun-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.1-pull-request' into staging linux-user pull request 20200605-v2 Implement F_OFD_ fcntl() command, /proc/cpuinfo
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.1-pull-request' into staging linux-user pull request 20200605-v2 Implement F_OFD_ fcntl() command, /proc/cpuinfo for hppa Fix socket(), prnctl() error codes, underflow in target_mremap, epoll_create() strace, oldumount for alpha User-mode build dependencies improvement # gpg: Signature made Sat 06 Jun 2020 14:15:36 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-5.1-pull-request: stubs: Restrict ui/win32-kbd-hook to system-mode hw/core: Restrict CpuClass::get_crash_info() to system-mode target/s390x: Restrict CpuClass::get_crash_info() to system-mode target/i386: Restrict CpuClass::get_crash_info() to system-mode arch_init: Remove unused 'qapi-commands-misc.h' include exec: Assert CPU migration is not used on user-only build target/riscv/cpu: Restrict CPU migration to system-mode stubs/Makefile: Reduce the user-mode object list util/Makefile: Reduce the user-mode object list tests/Makefile: Restrict some softmmu-only tests tests/Makefile: Only display TCG-related tests when TCG is available configure: Avoid building TCG when not needed Makefile: Only build virtiofsd if system-mode is enabled linux-user: implement OFD locks linux-user/mmap.c: fix integer underflow in target_mremap linux-user/strace.list: fix epoll_create{,1} -strace output linux-user: Add support for /proc/cpuinfo on hppa platform linux-user: return target error codes for socket() and prctl() linux-user, alpha: fix oldumount syscall Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5cc7a54c |
| 02-Jun-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200602' into staging Vector rotate support Signal handling support for NetBSD arm/aarch64 # gpg: Signature made Tue 02
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200602' into staging Vector rotate support Signal handling support for NetBSD arm/aarch64 # gpg: Signature made Tue 02 Jun 2020 17:43:05 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20200602: accel/tcg: Provide a NetBSD specific aarch64 cpu_signal_handler accel/tcg: Adjust cpu_signal_handler for NetBSD/arm tcg: Improve move ops in liveness_pass_2 target/s390x: Use tcg_gen_gvec_rotl{i,s,v} target/ppc: Use tcg_gen_gvec_rotlv tcg/ppc: Implement INDEX_op_rot[lr]v_vec tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec tcg/i386: Implement INDEX_op_rotl{i,s,v}_vec tcg: Implement gvec support for rotate by scalar tcg: Remove expansion to shift by vector from do_shifts tcg: Implement gvec support for rotate by vector tcg: Implement gvec support for rotate by immediate Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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ab87a66f |
| 19-Apr-2020 |
Richard Henderson <richard.henderson@linaro.org> |
tcg/ppc: Implement INDEX_op_rot[lr]v_vec We already had support for rotlv, using a target-specific opcode; convert to use the generic opcode. Handle rotrv via simple negation.
tcg/ppc: Implement INDEX_op_rot[lr]v_vec We already had support for rotlv, using a target-specific opcode; convert to use the generic opcode. Handle rotrv via simple negation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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bbe16574 |
| 18-Nov-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/ppc-for-4.2-pull-request' into staging ppc patch queue 2019-11-15 Several fixes for 4.2.0-rc2: fix mos6522 performance is
Merge remote-tracking branch 'remotes/vivier2/tags/ppc-for-4.2-pull-request' into staging ppc patch queue 2019-11-15 Several fixes for 4.2.0-rc2: fix mos6522 performance issue, xive/xics issues, fix /chosen device-tree on reset and KVM default cpu-model for all machine classes # gpg: Signature made Mon 18 Nov 2019 10:52:19 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "lvivier@redhat.com" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/ppc-for-4.2-pull-request: mos6522: fix T1 and T2 timers spapr/kvm: Set default cpu model for all machine classes spapr: Add /chosen to FDT only at reset time to preserve kernel and initramdisk ppc: Skip partially initialized vCPUs in 'info pic' xive, xics: Fix reference counting on CPU objects ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChip Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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b0f2855b |
| 12-Nov-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2019-11-12' into staging - Fix memory leaks for QTESTS - Update MAINTAINERS file - Check for the availability of b
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2019-11-12' into staging - Fix memory leaks for QTESTS - Update MAINTAINERS file - Check for the availability of bzip2 in "configure" # gpg: Signature made Tue 12 Nov 2019 06:09:09 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2019-11-12: configure: Check bzip2 is available configure: Only decompress EDK2 blobs for X86/ARM targets tests/migration: Print some debug on bad status MAINTAINERS: slirp: Remove myself as maintainer cpu-plug-test: fix leaks qtest: fix qtest_qmp_device_add leak Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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9f2ce35d |
| 11-Nov-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191111' into staging Remove no-longer-true statement that TCG is BSD-licensed # gpg: Signature made Mon 11 Nov 2019 15:24:0
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191111' into staging Remove no-longer-true statement that TCG is BSD-licensed # gpg: Signature made Mon 11 Nov 2019 15:24:06 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20191111: tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing tcg/ppc/tcg-target.opc.h: Add copyright/license tcg/i386/tcg-target.opc.h: Add copyright/license tcg/aarch64/tcg-target.opc.h: Add copyright/license Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2552e30c |
| 25-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
tcg/ppc/tcg-target.opc.h: Add copyright/license Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h. This file has had only two commits, 4b06c216826b7e4 and d9897efa1
tcg/ppc/tcg-target.opc.h: Add copyright/license Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h. This file has had only two commits, 4b06c216826b7e4 and d9897efa1fd3174ec, both by a Linaro engineer. The license is MIT, since that's what the rest of tcg/ppc/ is. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20191025155848.17362-4-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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ea0ec714 |
| 24-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/xtensa/tags/20191023-xtensa' into staging target/xtensa improvements for v4.2: - regenerate and reimport test_mmuhifi_c3 core; - add virt m
Merge remote-tracking branch 'remotes/xtensa/tags/20191023-xtensa' into staging target/xtensa improvements for v4.2: - regenerate and reimport test_mmuhifi_c3 core; - add virt machine. # gpg: Signature made Wed 23 Oct 2019 23:56:42 BST # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20191023-xtensa: hw/xtensa: add virt machine target/xtensa: regenerate and re-import test_mmuhifi_c3 core Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d52932ed |
| 17-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging x86 and machine queue, 2019-10-15 Features: * Snowridge-v2 (no MPX) CPU model (Xiaoya
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging x86 and machine queue, 2019-10-15 Features: * Snowridge-v2 (no MPX) CPU model (Xiaoyao Li) Bug fixes: * cpu-plug-test: fix device_add for pc/q35 machines (Igor Mammedov) * Fix legacy guest with xsave panic on older Linux kernel (Bingsong Si) * Omit all-zeroes entries from KVM CPUID table (Eduardo Habkost) Cleanups: * Convert reset handlers to DeviceReset (Philippe Mathieu-Daudé) * MachineClass::auto_enable_numa field (Tao Xu) * target/i386/cpu.h cleanups (Tao Xu) * memory_device_get_free_addr() cleanups (Wei Yang) # gpg: Signature made Tue 15 Oct 2019 22:35:43 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: target/i386: Add Snowridge-v2 (no MPX) CPU model i386: Omit all-zeroes entries from KVM CPUID table i386: Fix legacy guest with xsave panic on host kvm without update cpuid. target/i386: drop the duplicated definition of cpuid AVX512_VBMI macro target/i386: clean up comments over 80 chars per line memory-device: break the loop if tmp exceed the hinted range memory-device: not necessary to use goto for the last check hw/misc/vmcoreinfo: Add comment about reset handler hw/input/lm832x: Convert reset handler to DeviceReset hw/isa/vt82c686: Convert reset handler to DeviceReset hw/ide/via82c: Convert reset handler to DeviceReset hw/ide/sii3112: Convert reset handler to DeviceReset hw/ide/piix: Convert reset handler to DeviceReset hw/isa/piix4: Convert reset handler to DeviceReset hw/acpi/piix4: Convert reset handler to DeviceReset numa: Introduce MachineClass::auto_enable_numa for implicit NUMA node tests: cpu-plug-test: fix device_add for pc/q35 machines tests: add qtest_qmp_device_add_qdict() helper Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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f22f553e |
| 17-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191013' into staging Host vector support for tcg/ppc. Fix thread=single cpu kicking. # gpg: Signature made Mon 14 Oct 2
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20191013' into staging Host vector support for tcg/ppc. Fix thread=single cpu kicking. # gpg: Signature made Mon 14 Oct 2019 15:11:55 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20191013: (23 commits) cpus: kick all vCPUs when running thread=single tcg/ppc: Update vector support for v3.00 dup/dupi tcg/ppc: Update vector support for v3.00 load/store tcg/ppc: Update vector support for v3.00 Altivec tcg/ppc: Update vector support for v2.07 FP tcg/ppc: Update vector support for v2.07 VSX tcg/ppc: Update vector support for v2.07 Altivec tcg/ppc: Update vector support for VSX tcg/ppc: Enable Altivec detection tcg/ppc: Support vector dup2 tcg/ppc: Support vector multiply tcg/ppc: Support vector shift by immediate tcg/ppc: Add support for vector saturated add/subtract tcg/ppc: Add support for vector add/subtract tcg/ppc: Add support for vector maximum/minimum tcg/ppc: Add support for load/store/logic/comparison tcg/ppc: Enable tcg backend vector compilation tcg/ppc: Replace HAVE_ISEL macro with a variable tcg/ppc: Replace HAVE_ISA_2_06 tcg/ppc: Create TCGPowerISA and have_isa ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d9897efa |
| 23-Jun-2019 |
Richard Henderson <richard.henderson@linaro.org> |
tcg/ppc: Support vector multiply For Altivec, this is always an expansion. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Aleksandar Markovic <amarkovi
tcg/ppc: Support vector multiply For Altivec, this is always an expansion. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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4b06c216 |
| 23-Jun-2019 |
Richard Henderson <richard.henderson@linaro.org> |
tcg/ppc: Enable tcg backend vector compilation Introduce all of the flags required to enable tcg backend vector support, and a runtime flag to indicate the host supports Altivec instruct
tcg/ppc: Enable tcg backend vector compilation Introduce all of the flags required to enable tcg backend vector support, and a runtime flag to indicate the host supports Altivec instructions. For now, do not actually set have_isa_altivec to true, because we have not yet added all of the code to actually generate all of the required insns. However, we must define these flags in order to disable ifndefs that create stub versions of the functions added here. The change to tcg_out_movi works around a buglet in tcg.c wherein if we do not define tcg_out_dupi_vec we get a declared but not defined Werror, but if we only declare it we get a defined but not used Werror. We need to this change to tcg_out_movi eventually anyway, so it's no biggie. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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