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8d77adbc |
| 06-Mar-2023 |
Anton Johansson <anjo@rev.ng> |
target/rx: Remove `NB_MMU_MODES` define
Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewe
target/rx: Remove `NB_MMU_MODES` define
Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230306175230.7110-18-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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29e0855c |
| 22-Mar-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/elmarco/tags/slirp-pull-request' into staging # gpg: Signature made Sun 22 Mar 2020 17:07:31 GMT # gpg: using RSA key 87A9BD933F87C60
Merge remote-tracking branch 'remotes/elmarco/tags/slirp-pull-request' into staging # gpg: Signature made Sun 22 Mar 2020 17:07:31 GMT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * remotes/elmarco/tags/slirp-pull-request: slirp: update submodule to v4.2.0+ Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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52a96afa |
| 20-Mar-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.0-pull-request' into staging update syscall numbers to linux 5.5 (with scripts) add clock_gettime64/clock_settime64
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.0-pull-request' into staging update syscall numbers to linux 5.5 (with scripts) add clock_gettime64/clock_settime64 add AT_EXECFN v4: restore syscall.tbl series but remove vsyscall series v3: remove syscall.tbl series v2: guard copy_to_user_timezone() with TARGET_NR_gettimeofday remove "Support futex_time64" patch guard sys_futex with TARGET_NR_exit # gpg: Signature made Fri 20 Mar 2020 15:23:29 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-5.0-pull-request: (32 commits) linux-user, openrisc: sync syscall numbers with kernel v5.5 linux-user, nios2: sync syscall numbers with kernel v5.5 linux-user, aarch64: sync syscall numbers with kernel v5.5 scripts: add a script to generate syscall_nr.h linux-user,mips: update syscall-args-o32.c.inc linux-user,mips: move content of mips_syscall_args linux-user: update syscall.tbl from linux 0bf999f9c5e7 linux-user, scripts: add a script to update syscall.tbl linux-user, mips64: add syscall table generation support linux-user, mips: add syscall table generation support linux-user, x86_64: add syscall table generation support linux-user, i386: add syscall table generation support linux-user, x86_64, i386: cleanup TARGET_NR_arch_prctl linux-user, sparc, sparc64: add syscall table generation support linux-user, s390x: add syscall table generation support linux-user, s390x: remove syscall definitions for !TARGET_S390X linux-user, ppc: add syscall table generation support linux-user, arm: add syscall table generation support linux-user, microblaze: add syscall table generation support linux-user, sh4: add syscall table generation support ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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3d0ac346 |
| 20-Mar-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request' into staging Python queue for 5.0 soft freeze * Add scripts/simplebench (Vladimir Sementsov-Ogievskiy)
Merge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request' into staging Python queue for 5.0 soft freeze * Add scripts/simplebench (Vladimir Sementsov-Ogievskiy) # gpg: Signature made Wed 18 Mar 2020 01:11:49 GMT # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/python-next-pull-request: MAINTAINERS: add simplebench scripts/simplebench: add example usage of simplebench scripts/simplebench: add qemu/bench_block_job.py scripts/simplebench: add simplebench.py Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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226cd207 |
| 20-Mar-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/target_renesas_rx-20200320' into staging Introduce the architectural part of the Renesas RX architecture emulation, developed by
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/target_renesas_rx-20200320' into staging Introduce the architectural part of the Renesas RX architecture emulation, developed by Yoshinori Sato. CI jobs results: https://gitlab.com/philmd/qemu/pipelines/127886344 https://travis-ci.org/github/philmd/qemu/builds/664579420 # gpg: Signature made Fri 20 Mar 2020 10:27:32 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/target_renesas_rx-20200320: Add rx-softmmu target/rx: Dump bytes for each insn during disassembly target/rx: Collect all bytes during disassembly target/rx: Emit all disassembly in one prt() target/rx: Use prt_ldmi for XCHG_mr disassembly target/rx: Replace operand with prt_ldmi in disassembler target/rx: Disassemble rx_index_addr into a string target/rx: RX disassembler target/rx: CPU definitions target/rx: TCG helpers target/rx: TCG translation MAINTAINERS: Add entry for the Renesas RX architecture hw/registerfields.h: Add 8bit and 16bit register macros Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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27a4a30e |
| 21-Jan-2019 |
Yoshinori Sato <ysato@users.sourceforge.jp> |
target/rx: CPU definitions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Richard Henderson <
target/rx: CPU definitions Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Use newer QOM style, split cpu-qom.h, restrict access to extable array, use rx_cpu_tlb_fill() extracted from patch of Yoshinori Sato 'Convert to CPUClass::tlb_fill', call cpu_reset after qemu_init_vcpu, make rx_crname a function] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200224141923.82118-7-ysato@users.sourceforge.jp> Acked-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Use GByteArray in gdbstub (rebase commit a010bdbe), use device_class_set_parent_reset (rebase commit 781c67ca)] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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