#
1db699f8 |
| 26-Oct-2023 |
Max Chou <max.chou@sifive.com> |
target/riscv: Replace Zvbb checking by Zvkb
The Zvkb extension is a proper subset of the Zvbb extension and includes following instructions: * vandn.[vv,vx] * vbrev8.v * vrev8.v * vrol.[vv,v
target/riscv: Replace Zvbb checking by Zvkb
The Zvkb extension is a proper subset of the Zvbb extension and includes following instructions: * vandn.[vv,vx] * vbrev8.v * vrev8.v * vrol.[vv,vx] * vror.[vv,vx,vi]
Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231026151828.754279-5-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
ad75a51e |
| 13-Sep-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@li
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
8b045ff4 |
| 11-Jul-2023 |
Max Chou <max.chou@sifive.com> |
target/riscv: Add Zvksed ISA extension support
This commit adds support for the Zvksed vector-crypto extension, which consists of the following instructions:
* vsm4k.vi * vsm4r.[vv,vs]
Translation
target/riscv: Add Zvksed ISA extension support
This commit adds support for the Zvksed vector-crypto extension, which consists of the following instructions:
* vsm4k.vi * vsm4r.[vv,vs]
Translation functions are defined in `target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in `target/riscv/vcrypto_helper.c`.
Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> [lawrence.hunter@codethink.co.uk: Moved SM4 functions from crypto_helper.c to vcrypto_helper.c] [nazar.kazakov@codethink.co.uk: Added alignment checks, refactored code to use macros, and minor style changes] Signed-off-by: Max Chou <max.chou@sifive.com> Message-ID: <20230711165917.2629866-16-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
767eb035 |
| 11-Jul-2023 |
Nazar Kazakov <nazar.kazakov@codethink.co.uk> |
target/riscv: Add Zvkg ISA extension support
This commit adds support for the Zvkg vector-crypto extension, which consists of the following instructions:
* vgmul.vv * vghsh.vv
Translation function
target/riscv: Add Zvkg ISA extension support
This commit adds support for the Zvkg vector-crypto extension, which consists of the following instructions:
* vgmul.vv * vghsh.vv
Translation functions are defined in `target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in `target/riscv/vcrypto_helper.c`.
Co-authored-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> [max.chou@sifive.com: Replaced vstart checking by TCG op] Signed-off-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> Signed-off-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> [max.chou@sifive.com: Exposed x-zvkg property] [max.chou@sifive.com: Replaced uint by int for cross win32 build] Message-ID: <20230711165917.2629866-13-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
2350881c |
| 11-Jul-2023 |
Lawrence Hunter <lawrence.hunter@codethink.co.uk> |
target/riscv: Add Zvksh ISA extension support
This commit adds support for the Zvksh vector-crypto extension, which consists of the following instructions:
* vsm3me.vv * vsm3c.vi
Translation funct
target/riscv: Add Zvksh ISA extension support
This commit adds support for the Zvksh vector-crypto extension, which consists of the following instructions:
* vsm3me.vv * vsm3c.vi
Translation functions are defined in `target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in `target/riscv/vcrypto_helper.c`.
Co-authored-by: Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk> [max.chou@sifive.com: Replaced vstart checking by TCG op] Signed-off-by: Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk> Signed-off-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> [max.chou@sifive.com: Exposed x-zvksh property] Message-ID: <20230711165917.2629866-12-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
fcf19433 |
| 11-Jul-2023 |
Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk> |
target/riscv: Add Zvknh ISA extension support
This commit adds support for the Zvknh vector-crypto extension, which consists of the following instructions:
* vsha2ms.vv * vsha2c[hl].vv
Translation
target/riscv: Add Zvknh ISA extension support
This commit adds support for the Zvknh vector-crypto extension, which consists of the following instructions:
* vsha2ms.vv * vsha2c[hl].vv
Translation functions are defined in `target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in `target/riscv/vcrypto_helper.c`.
Co-authored-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Co-authored-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> [max.chou@sifive.com: Replaced vstart checking by TCG op] Signed-off-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Signed-off-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> Signed-off-by: Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk> Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> [max.chou@sifive.com: Exposed x-zvknha & x-zvknhb properties] [max.chou@sifive.com: Replaced SEW selection to happened during translation] Message-ID: <20230711165917.2629866-11-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
e972bf22 |
| 11-Jul-2023 |
Nazar Kazakov <nazar.kazakov@codethink.co.uk> |
target/riscv: Add Zvkned ISA extension support
This commit adds support for the Zvkned vector-crypto extension, which consists of the following instructions:
* vaesef.[vv,vs] * vaesdf.[vv,vs] * vae
target/riscv: Add Zvkned ISA extension support
This commit adds support for the Zvkned vector-crypto extension, which consists of the following instructions:
* vaesef.[vv,vs] * vaesdf.[vv,vs] * vaesdm.[vv,vs] * vaesz.vs * vaesem.[vv,vs] * vaeskf1.vi * vaeskf2.vi
Translation functions are defined in `target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in `target/riscv/vcrypto_helper.c`.
Co-authored-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> Co-authored-by: William Salmon <will.salmon@codethink.co.uk> [max.chou@sifive.com: Replaced vstart checking by TCG op] Signed-off-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> Signed-off-by: William Salmon <will.salmon@codethink.co.uk> Signed-off-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> [max.chou@sifive.com: Imported aes-round.h and exposed x-zvkned property] [max.chou@sifive.com: Fixed endian issues and replaced the vstart & vl egs checking by helper function] [max.chou@sifive.com: Replaced bswap32 calls in aes key expanding] Message-ID: <20230711165917.2629866-10-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
06028472 |
| 11-Jul-2023 |
Dickon Hood <dickon.hood@codethink.co.uk> |
target/riscv: Add Zvbb ISA extension support
This commit adds support for the Zvbb vector-crypto extension, which consists of the following instructions:
* vrol.[vv,vx] * vror.[vv,vx,vi] * vbrev8.v
target/riscv: Add Zvbb ISA extension support
This commit adds support for the Zvbb vector-crypto extension, which consists of the following instructions:
* vrol.[vv,vx] * vror.[vv,vx,vi] * vbrev8.v * vrev8.v * vandn.[vv,vx] * vbrev.v * vclz.v * vctz.v * vcpop.v * vwsll.[vv,vx,vi]
Translation functions are defined in `target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in `target/riscv/vcrypto_helper.c`.
Co-authored-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Co-authored-by: William Salmon <will.salmon@codethink.co.uk> Co-authored-by: Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk> [max.chou@sifive.com: Fix imm mode of vror.vi] Signed-off-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Signed-off-by: William Salmon <will.salmon@codethink.co.uk> Signed-off-by: Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk> Signed-off-by: Dickon Hood <dickon.hood@codethink.co.uk> Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> [max.chou@sifive.com: Exposed x-zvbb property] Message-ID: <20230711165917.2629866-9-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
e13c7d3b |
| 11-Jul-2023 |
Lawrence Hunter <lawrence.hunter@codethink.co.uk> |
target/riscv: Add Zvbc ISA extension support
This commit adds support for the Zvbc vector-crypto extension, which consists of the following instructions:
* vclmulh.[vx,vv] * vclmul.[vx,vv]
Transla
target/riscv: Add Zvbc ISA extension support
This commit adds support for the Zvbc vector-crypto extension, which consists of the following instructions:
* vclmulh.[vx,vv] * vclmul.[vx,vv]
Translation functions are defined in `target/riscv/insn_trans/trans_rvvk.c.inc` and helpers are defined in `target/riscv/vcrypto_helper.c`.
Co-authored-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Co-authored-by: Max Chou <max.chou@sifive.com> Signed-off-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk> Signed-off-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk> Signed-off-by: Max Chou <max.chou@sifive.com> [max.chou@sifive.com: Exposed x-zvbc property] Message-ID: <20230711165917.2629866-5-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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