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450cb7ec |
| 15-Mar-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binaries
Per the release 6.06 revision history:
5.03 August 21, 2013
• ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField
linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binaries
Per the release 6.06 revision history:
5.03 August 21, 2013
• ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField Descriptions” were optional in release 3 and could be R/W, but as of release 5 are required, read-only, and preset by hardware.
The P5600 core implements the release 5, and has the ABS2008 and NAN2008 bits set in CP1_fcr31. Therefore it is able to run ELF binaries compiled with EF_MIPS_NAN2008, such the CIP United Debian NaN2008 distribution: http://repo.oss.cipunited.com/mipsel-nan2008/README.txt
In order to run such compiled binaries, select by default the P5600 core when the ELF 'MIPS_NAN2008' flag is set.
Reported-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230327162444.388-1-philmd@linaro.org>
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Revision tags: v6.2.0, v6.1.0, v4.2.0, v4.0.0-rc1, v4.0.0-rc0, v3.1.0, v3.1.0-rc5, v3.1.0-rc4, v3.1.0-rc3, v3.1.0-rc2, v3.1.0-rc1, v3.1.0-rc0 |
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#
7d51a855 |
| 31-Oct-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/xtensa/tags/20181030-xtensa' into staging target/xtensa: support for bFLT binaries - add support for bFLT binaries for target/xtensa - fix
Merge remote-tracking branch 'remotes/xtensa/tags/20181030-xtensa' into staging target/xtensa: support for bFLT binaries - add support for bFLT binaries for target/xtensa - fix per-architecture target_flat.h customization - fix initial stack pointer for bFLT # gpg: Signature made Tue 30 Oct 2018 18:27:42 GMT # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20181030-xtensa: linux-user/flatload: fix initial stack pointer alignment linux-user: xtensa: enable bFLT support Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e8b38d73 |
| 30-Oct-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20181029-pull-request' into staging usb: fixes for ohci and smart card emulation. # gpg: Signature made Mon 29 Oct 2018 20:02:3
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20181029-pull-request' into staging usb: fixes for ohci and smart card emulation. # gpg: Signature made Mon 29 Oct 2018 20:02:34 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20181029-pull-request: hw: ccid-card-emulated: cleanup resource when realize in error path hw: ccid-card-emulated: introduce clean_event_notifier usb: ohci: make num_ports to an unsinged integer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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ef3a6af5 |
| 29-Oct-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20181029-pull-request' into staging vga: two fixes. # gpg: Signature made Mon 29 Oct 2018 12:46:20 GMT # gpg:
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20181029-pull-request' into staging vga: two fixes. # gpg: Signature made Mon 29 Oct 2018 12:46:20 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20181029-pull-request: vga_int: remove unused function protype qxl: store channel id in qxl->id Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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6e6ffc9f |
| 25-Oct-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue, 2018-10-25 * sysbus init/realize cleanups (Cédric Le Goater, Philipp
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue, 2018-10-25 * sysbus init/realize cleanups (Cédric Le Goater, Philippe Mathieu-Daudé) * memory-device refactoring (David Hildenbrand) * -smp: deprecate incorrect CPUs topology (Igor Mammedov) * -numa parsing cleanups (Markus Armbruster) * Fix hostmem-file memory leak (Zhang Yi) * Typo fix (Li Qiang) # gpg: Signature made Thu 25 Oct 2018 14:31:46 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (43 commits) net: xgmac: convert SysBus init method to a realize method net: stellaris_enet: add a reset method net: stellaris_enet: convert SysBus init method to a realize method net: smc91c111: convert SysBus init method to a realize method net: opencores_eth: convert SysBus init method to a realize method net: mipsnet: convert SysBus init method to a realize method net: milkymist_minimac2: convert SysBus init method to a realize method net: lance: convert SysBus init method to a realize method net: lan9118: convert SysBus init method to a realize method net: etraxfs_eth: add a reset method net: etraxfs_eth: convert SysBus init method to a realize method memory-device: trace when pre_plugging/plugging/unplugging memory-device: complete factoring out unplug handling memory-device: complete factoring out plug handling memory-device: complete factoring out pre_plug handling memory-device: add device class function set_addr() memory-device: drop get_region_size() memory-device: factor out get_memory_region() from pc-dimm memory-device: add and use memory_device_get_region_size() memory-device: document MemoryDeviceClass ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
808ebd66 |
| 25-Oct-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0' into staging First RISC-V Patch Set for the 3.1 Soft Freeze This pull request contains a handful of patche
Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0' into staging First RISC-V Patch Set for the 3.1 Soft Freeze This pull request contains a handful of patches that have been floating around various trees for a while but haven't made it upstream. These patches all appear quite safe. They're all somewhat independent from each other: * One refactors our IRQ management function to allow multiple interrupts to be raised an once. This patch has no functional difference. * Cleaning up the op_helper/cpu_helper split. This patch has no functional difference. * Updates to various constants to keep them in sync with the latest ISA specification and to remove some non-standard bits that snuck in. * A fix for a memory leak in the PLIC driver. * A fix to our device tree handling to avoid provinging a NULL string. I've given this my standard test: building the port, booting a Fedora root filesytem on the latest Linux tag, and then shutting down that image. Essentially I'm just following the QEMU RISC-V wiki page's instructions. Everything looks fine here. We have a lot more outstanding patches so I'll definately be submitting another PR for the soft freeze. # gpg: Signature made Wed 17 Oct 2018 21:17:52 BST # gpg: using RSA key EF4CA1502CCBAB41 # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/riscv/tags/riscv-for-master-3.1-sf0: RISC-V: Don't add NULL bootargs to device-tree RISC-V: Add missing free for plic_hart_config RISC-V: Update CSR and interrupt definitions RISC-V: Move non-ops from op_helper to cpu_helper RISC-V: Allow setting and clearing multiple irqs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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c9629203 |
| 24-Oct-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-oct-2018-part-2-v2' into staging MIPS queue for October 2018 - part 2 - v2 # gpg: Signature made Wed 24 Oct 2018 14:2
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-oct-2018-part-2-v2' into staging MIPS queue for October 2018 - part 2 - v2 # gpg: Signature made Wed 24 Oct 2018 14:22:54 BST # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-oct-2018-part-2-v2: (33 commits) target/mips: Fix decoding of ALIGN and DALIGN instructions target/mips: Fix the title of translate.c linux-user/mips: Recognize the R5900 CPU model target/mips: Define the R5900 CPU tests/tcg/mips: Add tests for R5900 DIVU1 tests/tcg/mips: Add tests for R5900 DIV1 tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1 tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1 tests/tcg/mips: Add tests for R5900 three-operand MULTU1 tests/tcg/mips: Add tests for R5900 three-operand MULT1 tests/tcg/mips: Add tests for R5900 three-operand MULTU tests/tcg/mips: Add tests for R5900 three-operand MULT target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only target/mips: Support R5900 MOVN, MOVZ and PREF instructions from MIPS IV target/mips: Support R5900 DIV1 and DIVU1 instructions target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1 instructions target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions target/mips: Support R5900 three-operand MULT and MULTU instructions target/mips: Add a placeholder for R5900 MMI3 instruction subclass target/mips: Add a placeholder for R5900 MMI2 instruction subclass ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
4d9e5a0e |
| 21-Oct-2018 |
Fredrik Noring <noring@nocrew.org> |
linux-user/mips: Recognize the R5900 CPU model This kind of ELF for the R5900 relies on an IEEE 754-1985 compliant FPU. The R5900 FPU hardware is noncompliant and it is therefore emulate
linux-user/mips: Recognize the R5900 CPU model This kind of ELF for the R5900 relies on an IEEE 754-1985 compliant FPU. The R5900 FPU hardware is noncompliant and it is therefore emulated in software by the Linux kernel. QEMU emulates a compliant FPU accordingly. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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Revision tags: libfdt-20181002, ppc-for-3.1-20180925, ppc-for-3.1-20180907, ppc-for-3.1-20180821, v3.0.0, v3.0.0-rc4, v2.12.1, ppc-for-3.0-20180801, v3.0.0-rc3, v3.0.0-rc2, v3.0.0-rc1, ppc-for-3.0-20180716, v3.0.0-rc0, ppc-for-3.0-20180709, ppc-for-3.0-20180703, v2.11.2, ppc-for-3.0-20180622, ppc-for-3.0-20180618, ppc-for-3.0-20180612, ppc-for-2.13-20180504, ppc-for-2.13-20180427, v2.12.0, v2.12.0-rc4, v2.12.0-rc3, ppc-for-2.12-20180410, v2.12.0-rc2, v2.12.0-rc1, v2.12.0-rc0, ppc-for-2.12-20180319, ppc-for-2.12-20180315, ppc-for-2.12-20180306, ppc-for-2.12-20180302 |
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#
0dc8ae5e |
| 01-Mar-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180301-v2' into staging - add query-cpus-fast and deprecate query-cpus, while adding s390 cpu information - remove s390x m
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180301-v2' into staging - add query-cpus-fast and deprecate query-cpus, while adding s390 cpu information - remove s390x memory hotplug implementation, which is not useable in this form - add boot menu support in the s390-ccw bios - expose s390x guest crash information - fixes and cleaups # gpg: Signature made Thu 01 Mar 2018 12:54:47 GMT # gpg: using RSA key DECF6B93C6F02FAF # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" # gpg: aka "Cornelia Huck <cohuck@kernel.org>" # gpg: aka "Cornelia Huck <cohuck@redhat.com>" # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20180301-v2: (27 commits) s390x/tcg: fix loading 31bit PSWs with the highest bit set s390x: remove s390_get_memslot_count s390x/sclp: remove memory hotplug support s390x/cpumodel: document S390FeatDef.bit not applicable hmp: change hmp_info_cpus to use query-cpus-fast qemu-doc: deprecate query-cpus qmp: add architecture specific cpu data for query-cpus-fast qmp: add query-cpus-fast qmp: expose s390-specific CPU info s390x/tcg: add various alignment checks s390x/tcg: fix disabling/enabling DAT s390/stattrib: Make SaveVMHandlers data static s390x/cpu: expose the guest crash information pc-bios/s390: Rebuild the s390x firmware images with the boot menu changes s390-ccw: interactive boot menu for scsi s390-ccw: use zipl values when no boot menu options are present s390-ccw: set cp_receive mask only when needed and consume pending service irqs s390-ccw: read user input for boot index via the SCLP console s390-ccw: print zipl boot menu s390-ccw: read stage2 boot loader data to find menu ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5116c331 |
| 01-Mar-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2018-02-21-2' into staging Merge tpm 2018/02/21 v2 # gpg: Signature made Tue 27 Feb 2018 13:50:28 GMT # gpg:
Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2018-02-21-2' into staging Merge tpm 2018/02/21 v2 # gpg: Signature made Tue 27 Feb 2018 13:50:28 GMT # gpg: using RSA key 75AD65802A0B4211 # gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211 * remotes/stefanberger/tags/pull-tpm-2018-02-21-2: tests: add test for TPM TIS device tests: Move common TPM test code into tpm-emu.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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66974397 |
| 27-Feb-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20180227-pull-request' into staging usb: add mtp write support. # gpg: Signature made Tue 27 Feb 2018 08:39:01 GMT # gpg:
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20180227-pull-request' into staging usb: add mtp write support. # gpg: Signature made Tue 27 Feb 2018 08:39:01 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20180227-pull-request: usb-mtp: Advertise SendObjectInfo for write support usb-mtp: Introduce write support for MTP objects usb-mtp: Support delete of mtp objects usb-mtp: print parent path in IN_IGNORED trace fn usb-mtp: Add one more argument when building results Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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3ec7b5d8 |
| 27-Feb-2018 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180227-pull-request' into staging virtio-gpu: add support for second capability set # gpg: Signature made Tue 27 Feb 2018 07:
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180227-pull-request' into staging virtio-gpu: add support for second capability set # gpg: Signature made Tue 27 Feb 2018 07:30:31 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20180227-pull-request: virtio-gpu-3d: add support for second capability set (v4) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
45506bdd |
| 20-Feb-2018 |
YunQiang Su <syq@debian.org> |
linux-user: MIPS set cpu to r6 CPU if binary is R6 So here we need to detect the version of binaries and set cpu_model for it. Signed-off-by: YunQiang Su <syq@debian.org> [l
linux-user: MIPS set cpu to r6 CPU if binary is R6 So here we need to detect the version of binaries and set cpu_model for it. Signed-off-by: YunQiang Su <syq@debian.org> [lv: original patch modified to move code into cpu_get_model()] Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180220173307.25125-5-laurent@vivier.eu>
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542ca434 |
| 20-Feb-2018 |
Laurent Vivier <laurent@vivier.eu> |
linux-user: Move CPU type name selection to a function Instead of a sequence of "#if ... #endif" move the selection to a function in linux-user/*/target_elf.h We can't add them
linux-user: Move CPU type name selection to a function Instead of a sequence of "#if ... #endif" move the selection to a function in linux-user/*/target_elf.h We can't add them in linux-user/*/target_cpu.h because we will need to include "elf.h" to use ELF flags with eflags, and including "elf.h" in "target_cpu.h" introduces some conflicts in elfload.c Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180220173307.25125-2-laurent@vivier.eu>
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