| e40b75fe | 19-Mar-2025 |
Sebastian Huber <sebastian.huber@embedded-brains.de> |
hw/riscv: Configurable MPFS CLINT timebase freq
This property enables the setting of the CLINT timebase frequency through the command line, for example:
-machine microchip-icicle-kit,clint-timeba
hw/riscv: Configurable MPFS CLINT timebase freq
This property enables the setting of the CLINT timebase frequency through the command line, for example:
-machine microchip-icicle-kit,clint-timebase-frequency=10000000
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250319061342.26435-6-sebastian.huber@embedded-brains.de> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| 1a65064c | 20-Nov-2024 |
Jim Shu <jim.shu@sifive.com> |
hw/riscv: Add the checking if DTB overlaps to kernel or initrd
DTB is placed to the end of memory, so we will check if the start address of DTB overlaps to the address of kernel/initrd.
Signed-off-
hw/riscv: Add the checking if DTB overlaps to kernel or initrd
DTB is placed to the end of memory, so we will check if the start address of DTB overlaps to the address of kernel/initrd.
Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20241120153935.24706-4-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| 2c12de14 | 06-Nov-2024 |
Sunil V L <sunilvl@ventanamicro.com> |
hw/riscv/virt: Add IOMMU as platform device if the option is set
Add a new machine option called 'iommu-sys' that enables a riscv-iommu-sys platform device for the 'virt' machine. The option is defa
hw/riscv/virt: Add IOMMU as platform device if the option is set
Add a new machine option called 'iommu-sys' that enables a riscv-iommu-sys platform device for the 'virt' machine. The option is default 'off'.
The device will use IRQs 36 to 39.
We will not support both riscv-iommu-sys and riscv-iommu-pci devices in the same board in this first implementation. If a riscv-iommu-pci device is added in the command line we will disable the riscv-iommu-sys device.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241106133407.604587-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| a828ba9d | 20-May-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/riscv/opentitan: Correct OpenTitanState parent type/size
OpenTitanState is the 'machine' (or 'board') state: it isn't a SysBus device, but inherits from the MachineState type. Correct the instanc
hw/riscv/opentitan: Correct OpenTitanState parent type/size
OpenTitanState is the 'machine' (or 'board') state: it isn't a SysBus device, but inherits from the MachineState type. Correct the instance size. Doing so we avoid leaking an OpenTitanState pointer in opentitan_machine_init().
Fixes: fe0fe4735e ("riscv: Initial commit of OpenTitan machine") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230520054510.68822-6-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| 8696b74a | 20-May-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/riscv/opentitan: Explicit machine type definition
Expand the DEFINE_MACHINE() macro, converting the class_init() handler.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: A
hw/riscv/opentitan: Explicit machine type definition
Expand the DEFINE_MACHINE() macro, converting the class_init() handler.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230520054510.68822-5-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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