History log of /openbmc/qemu/include/hw/gpio/sifive_gpio.h (Results 1 – 11 of 11)
Revision Date Author Comments
# c122bca9 23-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/ericb/tags/pull-bitmaps-2020-09-21' into staging

bitmaps patches for 2020-09-21

- Eric Blake: Improve 'qemu-img bitmap --merge' by not opening

Merge remote-tracking branch 'remotes/ericb/tags/pull-bitmaps-2020-09-21' into staging

bitmaps patches for 2020-09-21

- Eric Blake: Improve 'qemu-img bitmap --merge' by not opening backing images

# gpg: Signature made Tue 22 Sep 2020 01:58:31 BST
# gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A
# gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full]
# gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full]
# gpg: aka "[jpeg image of size 6874]" [full]
# Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A

* remotes/ericb/tags/pull-bitmaps-2020-09-21:
qemu-img: Support bitmap --merge into backing image

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 0fc01428 22-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/kraxel/tags/input-20200921-pull-request' into staging

input: tsc2xxx fix.

# gpg: Signature made Mon 21 Sep 2020 12:09:17 BST
# gpg:

Merge remote-tracking branch 'remotes/kraxel/tags/input-20200921-pull-request' into staging

input: tsc2xxx fix.

# gpg: Signature made Mon 21 Sep 2020 12:09:17 BST
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/input-20200921-pull-request:
hw/input/tsc2xxx: Reduce MouseTransformInfo structure exposure

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# edf6ea6f 22-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200921-pull-request' into staging

usb: fix u2f build
usb: fix ohci oob access and loop issues

# gpg: Signature made Mon 2

Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200921-pull-request' into staging

usb: fix u2f build
usb: fix ohci oob access and loop issues

# gpg: Signature made Mon 21 Sep 2020 09:58:06 BST
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/usb-20200921-pull-request:
hw: usb: hcd-ohci: check for processed TD before retire
hw: usb: hcd-ohci: check len and frame_number variables
usb: fix u2f build

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 834b9273 22-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging

Pull request trivial patches 20200919

# gpg: Signature made Sat 19 Sep 2020 19:4

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging

Pull request trivial patches 20200919

# gpg: Signature made Sat 19 Sep 2020 19:43:35 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-for-5.2-pull-request:
contrib/: fix some comment spelling errors
qapi/: fix some comment spelling errors
disas/: fix some comment spelling errors
linux-user/: fix some comment spelling errors
util/: fix some comment spelling errors
scripts/: fix some comment spelling errors
docs/: fix some comment spelling errors
migration/: fix some comment spelling errors
qemu/: fix some comment spelling errors
scripts/git.orderfile: Display meson files along with buildsys ones
hw/timer/hpet: Fix debug format strings
hw/timer/hpet: Remove unused functions hpet_ram_readb, hpet_ram_readw
meson: remove empty else and duplicated gio deps
manual: escape backslashes in "parsed-literal" blocks
ui/spice-input: Remove superfluous forward declaration
hw/ppc/ppc4xx_pci: Replace magic value by the PCI_NUM_PINS definition
hw/gpio/max7310: Remove impossible check

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 4dad0a9a 21-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging

QOM queue, 2020-09-18

Fixes:
* Error value corrections (Markus Armbruster)
* Corr

Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging

QOM queue, 2020-09-18

Fixes:
* Error value corrections (Markus Armbruster)
* Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost)
* Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson)

QOM cleanups (Eduardo Habkost):
* Rename some constants
* Simplify parameters of OBJECT_DECLARE* macros
* Additional DECLARE_*CHECKER* usage
* Additional OBJECT_DECLARE_TYPE usage
* Additional OBJECT_DECLARE_SIMPLE_TYPE usage

# gpg: Signature made Fri 18 Sep 2020 21:45:29 BST
# gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg: issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request:
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
Use OBJECT_DECLARE_TYPE when possible
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE
scripts/codeconverter: Update to latest version
target/s390x: Set instance_align on S390CPU TypeInfo
target/riscv: Set instance_align on RISCVCPU TypeInfo
target/ppc: Set instance_align on PowerPCCPU TypeInfo
target/arm: Set instance_align on CPUARM TypeInfo
qom: Allow objects to be allocated with increased alignment
qom: Correct error values in two contracts
qom: Clean up object_property_get_enum()'s error value
qom: Correct object_class_dynamic_cast_assert() documentation
sifive: Use DECLARE_*CHECKER* macros
sifive: Move QOM typedefs and add missing includes
sifive_u: Rename memmap enum constants
sifive_e: Rename memmap enum constants

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# e38d3c5c 31-Aug-2020 Eduardo Habkost <ehabkost@redhat.com>

sifive: Use DECLARE_*CHECKER* macros

$ ./scripts/codeconverter/converter.py -i \
--pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')

Signed-off-by: Eduardo Habkost <ehabk

sifive: Use DECLARE_*CHECKER* macros

$ ./scripts/codeconverter/converter.py -i \
--pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20200831210740.126168-12-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

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# ac900ede 31-Aug-2020 Eduardo Habkost <ehabkost@redhat.com>

sifive: Move QOM typedefs and add missing includes

Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definition

sifive: Move QOM typedefs and add missing includes

Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.

Patch generated using:

$ ./scripts/codeconverter/converter.py -i \
--pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')

which will split "typdef struct { ... } TypedefName"
declarations.

Followed by:

$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
$(git grep -l '' -- '*.[ch]')

which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

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# a68694cd 14-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200914' into staging

EDK2 firmware: Adopt the edk2-stable202008 release

Note from Laszlo Ersek [1] while address

Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200914' into staging

EDK2 firmware: Adopt the edk2-stable202008 release

Note from Laszlo Ersek [1] while addressing LP#1852196 [2]:

Consume the following upstream edk2 releases:

https://github.com/tianocore/edk2/releases/tag/edk2-stable201908
https://github.com/tianocore/edk2/releases/tag/edk2-stable201911
https://github.com/tianocore/edk2/releases/tag/edk2-stable202002
https://github.com/tianocore/edk2/releases/tag/edk2-stable202005
https://github.com/tianocore/edk2/releases/tag/edk2-stable202008

Worth mentioning (in random order):

- various CVE fixes (see [2] and shortlog)
- OpenSSL-1.1.1g
- UEFI HTTPS Boot for ARM/AARCH64
- TPM2 for ARM/AARCH64
- VCPU hotplug with SMI
- support for Linux v5.7+ initrd and mixed mode loading
- Fusion-MPT SCSI driver in OVMF
- VMware PVSCSI driver in OVMF
- PXEv4 / PXEv6 boot possible to disable on the QEMU command line
- SEV-ES support

The IA32 and X64 binaries are now smaller -- the reason is that Laszlo
built them with DevToolSet 9 (gcc-9) on RHEL7, and so this is the first
time they've undergone LTO (with the GCC5 edk2 toolchain settings).

CI jobs results:
https://gitlab.com/philmd/qemu/-/pipelines/189394120
https://travis-ci.org/github/philmd/qemu/builds/726842542
https://app.shippable.com/github/philmd/qemu/runs/866/summary/console

[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg738173.html
[2] https://bugs.launchpad.net/qemu/+bug/1852196

# gpg: Signature made Mon 14 Sep 2020 08:15:37 BST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/edk2-next-20200914:
tests: acpi: update "virt/SSDT.memhp" for edk2-stable202008
pc-bios: update the README file with edk2-stable202008 information
pc-bios: refresh edk2 build artifacts for edk2-stable202008
roms/Makefile.edk2: enable new ARM/AARCH64 flags up to edk2-stable202008
roms/Makefile.edk2: complete replacing TPM2*_ENABLE macros
roms/edk2: update submodule from edk2-stable201905 to edk2-stable202008
tests: acpi: tolerate "virt/SSDT.memhp" mismatch temporarily
roms/Makefile.edk2: prepare for replacing TPM2*_ENABLE macros
roms/efirom, tests/uefi-test-tools: update edk2's own submodules first
Makefile: remove obsolete edk2 exception from "clean" rule

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 95f21798 14-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2020-09-12-tag' into staging

patch queue for qemu-ga

* add guest-get-devices for reporting virtio devices (w32-only)
*

Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2020-09-12-tag' into staging

patch queue for qemu-ga

* add guest-get-devices for reporting virtio devices (w32-only)
* extend guest-get-fsinfo to support non-PCI virtio disk controllers

# gpg: Signature made Mon 14 Sep 2020 02:53:51 BST
# gpg: using RSA key CEACC9E15534EBABB82D3FA03353C9CEF108B584
# gpg: issuer "mdroth@linux.vnet.ibm.com"
# gpg: Good signature from "Michael Roth <flukshun@gmail.com>" [full]
# gpg: aka "Michael Roth <mdroth@utexas.edu>" [full]
# gpg: aka "Michael Roth <mdroth@linux.vnet.ibm.com>" [full]
# Primary key fingerprint: CEAC C9E1 5534 EBAB B82D 3FA0 3353 C9CE F108 B584

* remotes/mdroth/tags/qga-pull-2020-09-12-tag:
qga: add command guest-get-devices for reporting VirtIO devices
qga/commands-posix: Support fsinfo for non-PCI virtio devices, too
qga/commands-posix: Move the udev code from the pci to the generic function
qga/commands-posix: Rework build_guest_fsinfo_for_real_device() function

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# f00f57f3 13-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging

This PR includes multiple fixes and features for RISC-V:
- Fixes a bug in printing trap ca

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging

This PR includes multiple fixes and features for RISC-V:
- Fixes a bug in printing trap causes
- Allows 16-bit writes to the SiFive test device. This fixes the
failure to reboot the RISC-V virt machine
- Support for the Microchip PolarFire SoC and Icicle Kit
- A reafactor of RISC-V code out of hw/riscv

# gpg: Signature made Thu 10 Sep 2020 19:08:06 BST
# gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054

* remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits)
hw/riscv: Sort the Kconfig options in alphabetical order
hw/riscv: Drop CONFIG_SIFIVE
hw/riscv: Always build riscv_hart.c
hw/riscv: Move sifive_test model to hw/misc
hw/riscv: Move sifive_uart model to hw/char
hw/riscv: Move riscv_htif model to hw/char
hw/riscv: Move sifive_plic model to hw/intc
hw/riscv: Move sifive_clint model to hw/intc
hw/riscv: Move sifive_gpio model to hw/gpio
hw/riscv: Move sifive_u_otp model to hw/misc
hw/riscv: Move sifive_u_prci model to hw/misc
hw/riscv: Move sifive_e_prci model to hw/misc
hw/riscv: sifive_u: Connect a DMA controller
hw/riscv: clint: Avoid using hard-coded timebase frequency
hw/riscv: microchip_pfsoc: Hook GPIO controllers
hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
hw/net: cadence_gem: Add a new 'phy-addr' property
hw/riscv: microchip_pfsoc: Connect a DMA controller
hw/dma: Add SiFive platform DMA controller emulation
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
# hw/riscv/trace-events

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# 4921a0ce 03-Sep-2020 Bin Meng <bin.meng@windriver.com>

hw/riscv: Move sifive_gpio model to hw/gpio

This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Le

hw/riscv: Move sifive_gpio model to hw/gpio

This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_gpio model to hw/gpio directory.

Note this also removes the trace-events in the hw/riscv directory,
since gpio is the only supported trace target in that directory.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-5-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

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