f2ba6ab6 | 12-Nov-2024 |
Igor Mammedov <imammedo@redhat.com> |
Revert "hw/acpi: Make CPUs ACPI `presence` conditional during vCPU hot-unplug"
This reverts commit 2d6cfbaf174b91dfa9a50065f7494634afb39c23.
The patch is supposed to be part of ARM CPU hotplug seri
Revert "hw/acpi: Make CPUs ACPI `presence` conditional during vCPU hot-unplug"
This reverts commit 2d6cfbaf174b91dfa9a50065f7494634afb39c23.
The patch is supposed to be part of ARM CPU hotplug series and has not value on its own without it. The series however is still in RFC stage and outside of scope 9.2 release.
On top of that it introduces not needed callback that pokes directly into CPU state without any need for that. Instead properties and AML generator option should be used to configure static platform depended vCPU presence state.
Drop the patch so that corrected version could be posted along with ARM CPU hotplug series and properly reviewed in relevant context. That also helps us to keep history cleaner with new patch being against original code vs a string of fixups on top of current mess.
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241112170258.2996640-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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bf1ecc8d | 03-Nov-2024 |
Salil Mehta <salil.mehta@huawei.com> |
hw/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states
Reflect the QOM vCPUs ACPI CPU hotplug states in the `_STA.Present` and and `_STA.Enabled` bits when the guest kernel evaluates t
hw/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states
Reflect the QOM vCPUs ACPI CPU hotplug states in the `_STA.Present` and and `_STA.Enabled` bits when the guest kernel evaluates the ACPI `_STA` method during initialization, as well as when vCPUs are hot-plugged or hot-unplugged. If the CPU is present then the its `enabled` status can be fetched using architecture-specific code [1].
Reference: [1] Example implementation of architecture-specific hook to fetch CPU `enabled status Link: https://github.com/salil-mehta/qemu/commit/c0b416b11e5af6505e558866f0eb6c9f3709173e
Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Message-Id: <20241103102419.202225-4-salil.mehta@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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58ee924b | 17-Jul-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* target/i386/tcg: fixes for seg_helper.c * SEV: Don't allow automatic fallback to legacy KVM_SEV_INIT, but also don't use
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* target/i386/tcg: fixes for seg_helper.c * SEV: Don't allow automatic fallback to legacy KVM_SEV_INIT, but also don't use it by default * scsi: honor bootindex again for legacy drives * hpet, utils, scsi, build, cpu: miscellaneous bugfixes
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: target/i386/tcg: save current task state before loading new one target/i386/tcg: use X86Access for TSS access target/i386/tcg: check for correct busy state before switching to a new task target/i386/tcg: Compute MMU index once target/i386/tcg: Introduce x86_mmu_index_{kernel_,}pl target/i386/tcg: Reorg push/pop within seg_helper.c target/i386/tcg: use PUSHL/PUSHW for error code target/i386/tcg: Allow IRET from user mode to user mode with SMAP target/i386/tcg: Remove SEG_ADDL target/i386/tcg: fix POP to memory in long mode hpet: fix HPET_TN_SETVAL for high 32-bits of the comparator hpet: fix clamping of period docs: Update description of 'user=username' for '-run-with' qemu/timer: Add host ticks function for LoongArch scsi: fix regression and honor bootindex again for legacy drives hw/scsi/lsi53c895a: bump instruction limit in scripts processing to fix regression disas: Fix build against Capstone v6 cpu: Free queued CPU work Revert "qemu-char: do not operate on sources from finalize callbacks" i386/sev: Don't allow automatic fallback to legacy KVM_SEV*_INIT
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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80f034c5 | 09-Jan-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState
@plugin_mem_cbs is accessed by tcg generated code, move it to CPUNegativeOffsetState.
Signed-off-by: Philippe Mathieu-Daudé <
accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState
@plugin_mem_cbs is accessed by tcg generated code, move it to CPUNegativeOffsetState.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240429213050.55177-4-philmd@linaro.org>
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fc44d592 | 29-Apr-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCG
So far cpu_plugin_mem_cbs_enabled() is only called from TCG, so reduce it to accel/tcg/.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro
accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCG
So far cpu_plugin_mem_cbs_enabled() is only called from TCG, so reduce it to accel/tcg/.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <5f59c754-44e5-4743-a2dd-87ef8e13eadf@linaro.org>
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15d62536 | 02-May-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
tcg: remove CPU* types from typedefs.h
hw/core/cpu.h is already using struct forward declarations in some cases to avoid inclusions, and otherwise CPUAddressSpace and CPUJumpCache are only used toge
tcg: remove CPU* types from typedefs.h
hw/core/cpu.h is already using struct forward declarations in some cases to avoid inclusions, and otherwise CPUAddressSpace and CPUJumpCache are only used together with their definition. CPUTLBEntryFull is always used when their definition is available. Remove all three from typedefs.h.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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6ce1c9d0 | 26-Mar-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header
The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUStat
exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header
The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUState and CPUClass. Some source files only require the BP/WP definitions and don't need to pull in all CPU* API. In order to simplify, create a new "exec/breakpoint.h" header.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240418192525.97451-3-philmd@linaro.org>
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42508261 | 12-Dec-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
exec: Declare target_words_bigendian() in 'exec/tswap.h'
We usually check target endianess before swapping values, so target_words_bigendian() declaration makes sense in "exec/tswap.h" with the targ
exec: Declare target_words_bigendian() in 'exec/tswap.h'
We usually check target endianess before swapping values, so target_words_bigendian() declaration makes sense in "exec/tswap.h" with the target swapping helpers.
Remove "hw/core/cpu.h" when it was only included to get the target_words_bigendian() declaration.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-16-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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