| d3d6def4 | 29-Oct-2024 |
Jamin Lin <jamin_lin@aspeedtech.com> |
hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600
According to the datasheet of AST2600 description, interrupt status set by HW
and clear to "0" by software writing "1" on the sp
hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600
According to the datasheet of AST2600 description, interrupt status set by HW
and clear to "0" by software writing "1" on the specific bit.
Therefore, if firmware set the specific bit "1" in the interrupt status
register(0x34), the specific bit of "s->irq_sts" should be cleared 0.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Fixes: fadefada4d07 ("aspeed/timer: Add support for IRQ status register on the AST2600")
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
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| ac2da7f9 | 03-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/timer: Remove omap_synctimer
Remove the omap_synctimer device, which is only in the OMAP2 SoC.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd
hw/timer: Remove omap_synctimer
Remove the omap_synctimer device, which is only in the OMAP2 SoC.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240903160751.4100218-46-peter.maydell@linaro.org
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| 3f2797a7 | 03-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/timer/pxa2xx_timer: Remove use of pxa.h header
pxa2xx_timer includes pxa.h, but it doesn't actually make
use of any of the #defines, function prototypes or structs
defined there. Remove the unnec
hw/timer/pxa2xx_timer: Remove use of pxa.h header
pxa2xx_timer includes pxa.h, but it doesn't actually make
use of any of the #defines, function prototypes or structs
defined there. Remove the unnecessary include (we will
shortly be removing the whole header file).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240903160751.4100218-15-peter.maydell@linaro.org
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| 7c912ffb | 16-Jul-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
hpet: avoid timer storms on periodic timers
If the period is set to a value that is too low, there could be no
time left to run the rest of QEMU. Do not trigger interrupts faster
than 1 MHz.
Signe
hpet: avoid timer storms on periodic timers
If the period is set to a value that is too low, there could be no
time left to run the rest of QEMU. Do not trigger interrupts faster
than 1 MHz.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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| 242d6653 | 16-Jul-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
hpet: store full 64-bit target value of the counter
Store the full 64-bit value at which the timer should fire.
This makes it possible to skip the imprecise hpet_calculate_diff()
step, and to remov
hpet: store full 64-bit target value of the counter
Store the full 64-bit value at which the timer should fire.
This makes it possible to skip the imprecise hpet_calculate_diff()
step, and to remove the clamping of the period to 31 or 63 bits.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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| c2366567 | 10-Jul-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
hpet: accept 64-bit reads and writes
Declare the MemoryRegionOps so that 64-bit reads and writes to the HPET
are received directly. This makes it possible to unify the code to
process low and high
hpet: accept 64-bit reads and writes
Declare the MemoryRegionOps so that 64-bit reads and writes to the HPET
are received directly. This makes it possible to unify the code to
process low and high parts: for 32-bit reads, extract the desired word;
for 32-bit writes, just merge the desired part into the old value and
proceed as with a 64-bit write.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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| ba88935b | 10-Jul-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
hpet: place read-only bits directly in "new_val"
The variable "val" is used for two different purposes. As an intermediate
value when writing configuration registers, and to store the cleared bits
hpet: place read-only bits directly in "new_val"
The variable "val" is used for two different purposes. As an intermediate
value when writing configuration registers, and to store the cleared bits
when writing ISR.
Use "new_val" for the former, and rename the variable so that it is clearer
for the latter case.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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| 340627ec | 10-Jul-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
hpet: fix HPET_TN_SETVAL for high 32-bits of the comparator
Commit 3787324101b ("hpet: Fix emulation of HPET_TN_SETVAL (Jan Kiszka)",
2009-04-17) applied the fix only to the low 32-bits of the compa
hpet: fix HPET_TN_SETVAL for high 32-bits of the comparator
Commit 3787324101b ("hpet: Fix emulation of HPET_TN_SETVAL (Jan Kiszka)",
2009-04-17) applied the fix only to the low 32-bits of the comparator, but
it should be done for the high bits as well. Otherwise, the high 32-bits
of the comparator cannot be written and they remain fixed to 0xffffffff.
Co-developed-by: TaiseiIto <taisei1212@outlook.jp>
Signed-off-by: TaiseiIto <taisei1212@outlook.jp>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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