42cbc937 | 14-Jul-2025 |
Anisa Su <anisa.su@samsung.com> |
hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa
hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-11-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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0a362772 | 14-Jul-2025 |
Anisa Su <anisa.su@samsung.com> |
hw/cxl: Create helper function to create DC Event Records from extents
Prepatory patch for following FMAPI Add/Release Patches. Refactors part of qmp_cxl_process_dynamic_capacity_prescriptive() into
hw/cxl: Create helper function to create DC Event Records from extents
Prepatory patch for following FMAPI Add/Release Patches. Refactors part of qmp_cxl_process_dynamic_capacity_prescriptive() into a helper function to create DC Event Records and insert in the event log.
Moves definition for CXL_NUM_EXTENTS_SUPPORTED to cxl.h so it can be accessed by cxl-mailbox-utils.c and cxl-events.c, where the helper function is defined.
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-10-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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69798d00 | 14-Jul-2025 |
Anisa Su <anisa.su@samsung.com> |
hw/mem: cxl_type3: Add DC Region bitmap lock
Add a lock on the bitmap of each CXLDCRegion in preparation for the next patch which implements FMAPI Set DC Region Configuration. This command can modif
hw/mem: cxl_type3: Add DC Region bitmap lock
Add a lock on the bitmap of each CXLDCRegion in preparation for the next patch which implements FMAPI Set DC Region Configuration. This command can modify the block size, which means the region's bitmap must be updated accordingly.
The lock becomes necessary when commands that add/release extents (meaning they update the bitmap too) are enabled on a different CCI than the CCI on which the FMAPI commands are enabled.
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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0686f160 | 14-Jul-2025 |
Anisa Su <anisa.su@samsung.com> |
hw/cxl: Move definition for dynamic_capacity_uuid and enum for DC event types to header
Move definition/enum to cxl_events.h for shared use in next patch
Reviewed-by: Fan Ni <fan.ni@samsung.com> Si
hw/cxl: Move definition for dynamic_capacity_uuid and enum for DC event types to header
Move definition/enum to cxl_events.h for shared use in next patch
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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3d1607cc | 14-Jul-2025 |
Anisa Su <anisa.su@samsung.com> |
hw/mem: cxl_type3: Add dsmas_flags to CXLDCRegion struct
Add booleans to DC Region struct to represent dsmas flags (defined in CDAT) in preparation for the next command, which returns the flags in t
hw/mem: cxl_type3: Add dsmas_flags to CXLDCRegion struct
Add booleans to DC Region struct to represent dsmas flags (defined in CDAT) in preparation for the next command, which returns the flags in the next mailbox command 0x5601.
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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9fde6eb3 | 14-Jul-2025 |
Anisa Su <anisa.su@samsung.com> |
hw/cxl: mailbox-utils: 0x5600 - FMAPI Get DCD Info
FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su
hw/cxl: mailbox-utils: 0x5600 - FMAPI Get DCD Info
FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Anisa Su <anisa.su@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250714174509.1984430-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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a3e0b1ff | 05-Mar-2025 |
Sweta Kumari <s5.kumari@samsung.com> |
hw/cxl/cxl-mailbox-utils: CXL CCI Get/Set alert config commands
1) get alert configuration(Opcode 4201h) 2) set alert configuration(Opcode 4202h)
Signed-off-by: Sweta Kumari <s5.kumari@samsung.com>
hw/cxl/cxl-mailbox-utils: CXL CCI Get/Set alert config commands
1) get alert configuration(Opcode 4201h) 2) set alert configuration(Opcode 4202h)
Signed-off-by: Sweta Kumari <s5.kumari@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250305092501.191929-7-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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9ac2c42f | 03-Feb-2025 |
Yao Xingtao <yaoxt.fnst@fujitsu.com> |
mem/cxl_type3: support 3, 6, 12 and 16 interleave ways
Since the kernel does not check the interleave capability, a 3-way, 6-way, 12-way or 16-way region can be create normally.
Applications can ac
mem/cxl_type3: support 3, 6, 12 and 16 interleave ways
Since the kernel does not check the interleave capability, a 3-way, 6-way, 12-way or 16-way region can be create normally.
Applications can access the memory of 16-way region normally because qemu can convert hpa to dpa correctly for the power of 2 interleave ways, after kernel implementing the check, this kind of region will not be created any more.
For non power of 2 interleave ways, applications could not access the memory normally and may occur some unexpected behaviors, such as segmentation fault.
So implements this feature is needed.
Link: https://lore.kernel.org/linux-cxl/3e84b919-7631-d1db-3e1d-33000f3f3868@fujitsu.com/ Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250203161908.145406-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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d3c92cf6 | 03-Feb-2025 |
Li Zhijian <lizhijian@fujitsu.com> |
hw/mem/cxl_type3: Ensure errp is set on realization failure
Simply pass the errp to its callee which will set errp if needed, to enhance error reporting for CXL Type 3 device initialization by setti
hw/mem/cxl_type3: Ensure errp is set on realization failure
Simply pass the errp to its callee which will set errp if needed, to enhance error reporting for CXL Type 3 device initialization by setting the errp when realization functions fail.
Previously, failing to set `errp` could result in errors being overlooked, causing the system to mistakenly treat failure scenarios as successful and potentially leading to redundant cleanup operations in ct3_exit().
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250203161908.145406-5-Jonathan.Cameron@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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06953e7e | 03-Feb-2025 |
Li Zhijian <lizhijian@fujitsu.com> |
hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure
Address a memory leak issue by ensuring `regs->special_ops` is freed when `msix_init_exclusive_bar()` encounters an
hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure
Address a memory leak issue by ensuring `regs->special_ops` is freed when `msix_init_exclusive_bar()` encounters an error during CXL Type3 device initialization.
Additionally, this patch renames err_address_space_free to err_msix_uninit for better clarity and logical flow
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250203161908.145406-4-Jonathan.Cameron@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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0401c432 | 03-Feb-2025 |
Li Zhijian <lizhijian@fujitsu.com> |
hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call
msix_uninit_exclusive_bar() should be paired with msix_init_exclusive_bar()
Ensure proper resource cleanup by adding the missing `msix_
hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call
msix_uninit_exclusive_bar() should be paired with msix_init_exclusive_bar()
Ensure proper resource cleanup by adding the missing `msix_uninit_exclusive_bar()` call for the Type3 CXL device.
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250203161908.145406-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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