Merge tag 'mips-20250715' of https://github.com/philmd/qemu into staging

MIPS patches queue

- Implement CRC32[c] (Release 6) instructions
- Convert Octeon LX instructions to decodetree
- Restrict I

Merge tag 'mips-20250715' of https://github.com/philmd/qemu into staging

MIPS patches queue

- Implement CRC32[c] (Release 6) instructions
- Convert Octeon LX instructions to decodetree
- Restrict ITU to TCG
- Fix ESP issue affecting WinNT (INACCESSIBLE_BOOT_DEVICE BSOD)
- Add missing FDT dependency for some MicroBlaze machines
- Remove execute bit on hppa-firmware blobs

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# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE

* tag 'mips-20250715' of https://github.com/philmd/qemu:
esp.c: only allow ESP commands permitted in the current asc_mode
esp.c: add asc_mode property to indicate the current ESP mode
esp.c: only call dma_memory_write function if transfer length is non-zero
esp.c: only call dma_memory_read function if transfer length is non-zero
esp.h: remove separate ESPState typedef
esp.c: improve comment in esp_transfer_data()
esp.c: only raise IRQ in esp_transfer_data() for CMD_SEL, CMD_SELATN and CMD_TI commands
hw/microblaze: Add missing FDT dependency
hw/intc/loongarch_extioi: Remove unnecessary 'qemu/typedefs.h' include
hw/mips: Restrict ITU to TCG
roms: re-remove execute bit from hppa-firmware*
tests/tcg/mips: Add tests for MIPS CRC32[c] instructions
target/mips: Have gen_[d]lsa() callers add 1 to shift amount argument
target/mips: Convert Octeon LX instructions to decodetree
target/mips: Extract generic gen_lx() helper
target/mips: Extract gen_base_index_addr() helper
target/mips: Add support for emulation of CRC32 instructions

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

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hw/intc/loongarch_extioi: Remove unnecessary 'qemu/typedefs.h' include

"qemu/typedefs.h" is already included by "qemu/osdep.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by

hw/intc/loongarch_extioi: Remove unnecessary 'qemu/typedefs.h' include

"qemu/typedefs.h" is already included by "qemu/osdep.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250708085859.7885-2-philmd@linaro.org>

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Merge tag 'pull-loongarch-20250619' of https://github.com/gaosong715/qemu into staging

pull-loongarch-20250619

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Merge tag 'pull-loongarch-20250619' of https://github.com/gaosong715/qemu into staging

pull-loongarch-20250619

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# gpg: Signature made Thu 19 Jun 2025 04:49:38 EDT
# gpg: using RSA key CA473C44D6A09C189A193FCD452B96852B268216
# gpg: Good signature from "Song Gao <gaosong@loongson.cn>" [unknown]
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# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: CA47 3C44 D6A0 9C18 9A19 3FCD 452B 9685 2B26 8216

* tag 'pull-loongarch-20250619' of https://github.com/gaosong715/qemu:
target/loongarch: fix vldi/xvldi raise wrong error
hw/loongarch/virt: Add kernel irqchip support
hw/loongarch/virt: Disable emulation with IOCSR misc register
target/loongarch: Report error with split kernel_irqchip option
hw/loongarch/virt: Add reset support for kernel irqchip
hw/intc/loongarch_pch: Inject irq line interrupt to kernel
hw/intc/loongarch_pch: Add kernel irqchip save and restore function
hw/intc/loongarch_pch: Add kernel irqchip realize function
hw/intc/loongarch_pch_msi: Inject MSI interrupt to kernel
hw/intc/loongarch_ipi: Add kernel irqchip save and restore function
hw/intc/loongson_ipi: Add load and save interface with ipi_common class
hw/intc/loongarch_ipi: Add kernel irqchip realize function
hw/intc/loongarch_extioi: Add kernel irqchip save and restore function
hw/intc/loongarch_extioi: Add kernel irqchip realize function

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

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hw/loongarch/virt: Add reset support for kernel irqchip

When system reboot, interrupt controller is restored to initial
state. However if interrupt controller extioi/ipi/pch_pic is
emulated in kerne

hw/loongarch/virt: Add reset support for kernel irqchip

When system reboot, interrupt controller is restored to initial
state. However if interrupt controller extioi/ipi/pch_pic is
emulated in kernel, it should notify kvm to do so. Here suspend
and restore API is used for reset, set initial state in qemu user
space and restore API is used to notify kvm to reload register
state.

Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Message-ID: <20250606063033.2557365-11-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>

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hw/intc/loongarch_extioi: Add kernel irqchip save and restore function

Add save and store funtction if kvm_irqchip_in_kernel() return true,
it is to get and set ExtIOI irqchip state from KVM kernel.

hw/intc/loongarch_extioi: Add kernel irqchip save and restore function

Add save and store funtction if kvm_irqchip_in_kernel() return true,
it is to get and set ExtIOI irqchip state from KVM kernel.

Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Message-ID: <20250606063033.2557365-3-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>

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hw/intc/loongarch_extioi: Add kernel irqchip realize function

Function kvm_extioi_realize() is added if kvm_irqchip_in_kernel is
set. It is to create and initialize ExtIOI device in kernel mode.

Re

hw/intc/loongarch_extioi: Add kernel irqchip realize function

Function kvm_extioi_realize() is added if kvm_irqchip_in_kernel is
set. It is to create and initialize ExtIOI device in kernel mode.

Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Message-ID: <20250606063033.2557365-2-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>

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