5dfaa75b | 13-Aug-2015 |
Peter Maydell <peter.maydell@linaro.org> |
hw/cpu/a15mpcore: Wire up hyp and secure physical timer interrupts
Since we now support both the hypervisor and the secure physical timer, wire their interrupt lines up in the a15mpcore wrapper obje
hw/cpu/a15mpcore: Wire up hyp and secure physical timer interrupts
Since we now support both the hypervisor and the secure physical timer, wire their interrupt lines up in the a15mpcore wrapper object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1437047249-2357-5-git-send-email-peter.maydell@linaro.org Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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4c25f365 | 10-Dec-2013 |
Peter Crosthwaite <peter.crosthwaite@xilinx.com> |
cpu/a9mpcore: reorder operations/declarations
To make it consistent for easier code reading. The order in which variables are defined and functions are called is set to match the address map orderin
cpu/a9mpcore: reorder operations/declarations
To make it consistent for easier code reading. The order in which variables are defined and functions are called is set to match the address map ordering.
The new consistent order of doing stuff is:
SCU -> GIC -> MPTimer -> WDT.
0 functional change.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 8f31398e6d9a93f57291399f269039da1a77a2b5.1385969450.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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7b960dc3 | 18-Aug-2013 |
Andreas Färber <afaerber@suse.de> |
arm11mpcore: Prepare for QOM embedding
Move state struct, type constant and cast macro to a new header.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber
arm11mpcore: Prepare for QOM embedding
Move state struct, type constant and cast macro to a new header.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
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08602ac5 | 18-Aug-2013 |
Andreas Färber <afaerber@suse.de> |
arm11mpcore: Convert ARM11MPCorePriveState to QOM realize
Embed child devices and replace SysBus initfn with realizefn.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas
arm11mpcore: Convert ARM11MPCorePriveState to QOM realize
Embed child devices and replace SysBus initfn with realizefn.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
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2c42c3a0 | 18-Aug-2013 |
Andreas Färber <afaerber@suse.de> |
arm11mpcore: Create container MemoryRegion in instance_init
This allows to map the region directly after object initialization.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
arm11mpcore: Create container MemoryRegion in instance_init
This allows to map the region directly after object initialization.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
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524a2d8e | 30-Jun-2013 |
Andreas Färber <andreas.faerber@web.de> |
a15mpcore: Embed GICState
This covers both emulated and KVM GIC.
Prepares for QOM realize.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.
a15mpcore: Embed GICState
This covers both emulated and KVM GIC.
Prepares for QOM realize.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
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