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523e45ac13-Jun-2024 Taylor Simpson <ltaylorsimpson@gmail.com>

Hexagon: lldb read/write predicate registers p0/p1/p2/p3

hexagon-core.xml only exposes register p3_0 which is an alias that
aggregates the predicate registers. It is more convenient for users
to in

Hexagon: lldb read/write predicate registers p0/p1/p2/p3

hexagon-core.xml only exposes register p3_0 which is an alias that
aggregates the predicate registers. It is more convenient for users
to interact directly with the predicate registers.

Tested with lldb downloaded from this location
https://github.com/llvm/llvm-project/releases/download/llvmorg-18.1.4/clang+llvm-18.1.4-x86_64-linux-gnu-ubuntu-18.04.tar.xz

BEFORE:
(lldb) reg read p3_0
p3_0 = 0x00000000
(lldb) reg read p0
error: Invalid register name 'p0'.
(lldb) reg write p1 0xf
error: Register not found for 'p1'.

AFTER:
(lldb) reg read p3_0
p3_0 = 0x00000000
(lldb) reg read p0
p0 = 0x00
(lldb) reg read -s 1
Predicate Registers:
p0 = 0x00
p1 = 0x00
p2 = 0x00
p3 = 0x00

(lldb) reg write p1 0xf
(lldb) reg read p3_0
p3_0 = 0x00000f00
(lldb) reg write p3_0 0xff00ff00
(lldb) reg read -s 1
Predicate Registers:
p0 = 0x00
p1 = 0xff
p2 = 0x00
p3 = 0xff

Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Message-Id: <20240613182209.140082-1-ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>

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/openbmc/qemu/.gitlab-ci.d/buildtest-template.yml
/openbmc/qemu/.gitlab-ci.d/buildtest.yml
/openbmc/qemu/.gitlab-ci.d/cirrus/freebsd-13.vars
/openbmc/qemu/.gitlab-ci.d/crossbuild-template.yml
/openbmc/qemu/MAINTAINERS
/openbmc/qemu/VERSION
/openbmc/qemu/accel/kvm/kvm-all.c
/openbmc/qemu/accel/kvm/kvm-cpus.h
/openbmc/qemu/accel/kvm/trace-events
/openbmc/qemu/accel/stubs/tcg-stub.c
/openbmc/qemu/accel/tcg/cpu-exec.c
/openbmc/qemu/accel/tcg/plugin-gen.c
/openbmc/qemu/accel/tcg/user-exec.c
/openbmc/qemu/audio/dbusaudio.c
/openbmc/qemu/audio/trace-events
/openbmc/qemu/backends/Kconfig
/openbmc/qemu/backends/iommufd.c
/openbmc/qemu/backends/meson.build
/openbmc/qemu/backends/spdm-socket.c
/openbmc/qemu/backends/trace-events
/openbmc/qemu/block/block-copy.c
/openbmc/qemu/block/vvfat.c
/openbmc/qemu/bsd-user/aarch64/signal.c
/openbmc/qemu/bsd-user/aarch64/target.h
/openbmc/qemu/bsd-user/aarch64/target_arch.h
/openbmc/qemu/bsd-user/aarch64/target_arch_cpu.c
/openbmc/qemu/bsd-user/aarch64/target_arch_cpu.h
/openbmc/qemu/bsd-user/aarch64/target_arch_elf.h
/openbmc/qemu/bsd-user/aarch64/target_arch_reg.h
/openbmc/qemu/bsd-user/aarch64/target_arch_signal.h
/openbmc/qemu/bsd-user/aarch64/target_arch_sigtramp.h
/openbmc/qemu/bsd-user/aarch64/target_arch_sysarch.h
/openbmc/qemu/bsd-user/aarch64/target_arch_thread.h
/openbmc/qemu/bsd-user/aarch64/target_arch_vmparam.h
/openbmc/qemu/bsd-user/aarch64/target_syscall.h
/openbmc/qemu/bsd-user/arm/target_arch_signal.h
/openbmc/qemu/bsd-user/freebsd/os-proc.c
/openbmc/qemu/bsd-user/i386/target_arch_signal.h
/openbmc/qemu/bsd-user/main.c
/openbmc/qemu/bsd-user/qemu.h
/openbmc/qemu/bsd-user/signal.c
/openbmc/qemu/bsd-user/x86_64/target_arch_signal.h
/openbmc/qemu/chardev/char-socket.c
/openbmc/qemu/chardev/char-win-stdio.c
/openbmc/qemu/chardev/msmouse.c
/openbmc/qemu/chardev/trace-events
/openbmc/qemu/configs/targets/aarch64-bsd-user.mak
/openbmc/qemu/contrib/plugins/Makefile
/openbmc/qemu/contrib/plugins/cache.c
/openbmc/qemu/contrib/plugins/execlog.c
/openbmc/qemu/contrib/plugins/lockstep.c
/openbmc/qemu/contrib/plugins/stoptrigger.c
/openbmc/qemu/contrib/systemd/qemu-vmsr-helper.service
/openbmc/qemu/contrib/systemd/qemu-vmsr-helper.socket
/openbmc/qemu/contrib/vhost-user-blk/vhost-user-blk.c
/openbmc/qemu/cpu-common.c
/openbmc/qemu/crypto/block-luks.c
/openbmc/qemu/crypto/init.c
/openbmc/qemu/crypto/tlssession.c
/openbmc/qemu/docs/about/emulation.rst
/openbmc/qemu/docs/devel/crypto.rst
/openbmc/qemu/docs/devel/index-internals.rst
/openbmc/qemu/docs/devel/luks-detached-header.rst
/openbmc/qemu/docs/devel/tcg-plugins.rst
/openbmc/qemu/docs/devel/testing.rst
/openbmc/qemu/docs/interop/firmware.json
/openbmc/qemu/docs/interop/qemu-ga.rst
/openbmc/qemu/docs/meson.build
/openbmc/qemu/docs/pcie_sriov.txt
/openbmc/qemu/docs/specs/acpi_hw_reduced_hotplug.rst
/openbmc/qemu/docs/specs/index.rst
/openbmc/qemu/docs/specs/pci-ids.rst
/openbmc/qemu/docs/specs/rapl-msr.rst
/openbmc/qemu/docs/specs/spdm.rst
/openbmc/qemu/docs/sphinx/depfile.py
/openbmc/qemu/docs/system/arm/aspeed.rst
/openbmc/qemu/docs/tools/index.rst
/openbmc/qemu/docs/tools/qemu-vmsr-helper.rst
/openbmc/qemu/dump/dump.c
hexagon-core.xml
/openbmc/qemu/gdbstub/gdbstub.c
/openbmc/qemu/hw/acpi/acpi-cpu-hotplug-stub.c
/openbmc/qemu/hw/acpi/cpu.c
/openbmc/qemu/hw/acpi/generic_event_device.c
/openbmc/qemu/hw/adc/aspeed_adc.c
/openbmc/qemu/hw/arm/aspeed.c
/openbmc/qemu/hw/arm/aspeed_ast2600.c
/openbmc/qemu/hw/arm/aspeed_ast27x0.c
/openbmc/qemu/hw/arm/aspeed_soc_common.c
/openbmc/qemu/hw/arm/mps2-tz.c
/openbmc/qemu/hw/arm/smmuv3-internal.h
/openbmc/qemu/hw/arm/virt.c
/openbmc/qemu/hw/audio/virtio-snd.c
/openbmc/qemu/hw/block/fdc-isa.c
/openbmc/qemu/hw/block/m25p80.c
/openbmc/qemu/hw/block/pflash_cfi01.c
/openbmc/qemu/hw/block/vhost-user-blk.c
/openbmc/qemu/hw/char/bcm2835_aux.c
/openbmc/qemu/hw/char/goldfish_tty.c
/openbmc/qemu/hw/core/cpu-common.c
/openbmc/qemu/hw/core/machine.c
/openbmc/qemu/hw/cxl/cxl-events.c
/openbmc/qemu/hw/cxl/cxl-host.c
/openbmc/qemu/hw/cxl/cxl-mailbox-utils.c
/openbmc/qemu/hw/display/virtio-gpu-gl.c
/openbmc/qemu/hw/i2c/aspeed_i2c.c
/openbmc/qemu/hw/i2c/mpc_i2c.c
/openbmc/qemu/hw/i386/acpi-build.c
/openbmc/qemu/hw/i386/amd_iommu.c
/openbmc/qemu/hw/i386/intel_iommu.c
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/openbmc/qemu/hw/i386/sgx.c
/openbmc/qemu/hw/ide/atapi.c
/openbmc/qemu/hw/ide/pci.c
/openbmc/qemu/hw/intc/Kconfig
/openbmc/qemu/hw/intc/loongarch_ipi.c
/openbmc/qemu/hw/intc/loongson_ipi.c
/openbmc/qemu/hw/intc/loongson_ipi_common.c
/openbmc/qemu/hw/intc/meson.build
/openbmc/qemu/hw/intc/pnv_xive2.c
/openbmc/qemu/hw/intc/pnv_xive2_regs.h
/openbmc/qemu/hw/intc/xive.c
/openbmc/qemu/hw/intc/xive2.c
/openbmc/qemu/hw/loongarch/Kconfig
/openbmc/qemu/hw/loongarch/virt.c
/openbmc/qemu/hw/mem/cxl_type3.c
/openbmc/qemu/hw/mips/loongson3_virt.c
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/openbmc/qemu/hw/net/allwinner_emac.c
/openbmc/qemu/hw/net/igb.c
/openbmc/qemu/hw/net/rtl8139.c
/openbmc/qemu/hw/net/vhost_net.c
/openbmc/qemu/hw/net/virtio-net.c
/openbmc/qemu/hw/nubus/nubus-virtio-mmio.c
/openbmc/qemu/hw/nvme/ctrl.c
/openbmc/qemu/hw/pci-host/gpex-acpi.c
/openbmc/qemu/hw/pci-host/gt64120.c
/openbmc/qemu/hw/pci/pci.c
/openbmc/qemu/hw/pci/pci_host.c
/openbmc/qemu/hw/pci/pcie_sriov.c
/openbmc/qemu/hw/pci/trace-events
/openbmc/qemu/hw/ppc/Kconfig
/openbmc/qemu/hw/ppc/meson.build
/openbmc/qemu/hw/ppc/pnv.c
/openbmc/qemu/hw/ppc/pnv_adu.c
/openbmc/qemu/hw/ppc/pnv_chiptod.c
/openbmc/qemu/hw/ppc/pnv_core.c
/openbmc/qemu/hw/ppc/pnv_lpc.c
/openbmc/qemu/hw/ppc/pnv_xscom.c
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/openbmc/qemu/hw/ppc/spapr_caps.c
/openbmc/qemu/hw/ppc/spapr_cpu_core.c
/openbmc/qemu/hw/ppc/spapr_pci.c
/openbmc/qemu/hw/ppc/spapr_vhyp_mmu.c
/openbmc/qemu/hw/ppc/spapr_vof.c
/openbmc/qemu/hw/ppc/trace-events
/openbmc/qemu/hw/ppc/vof.c
/openbmc/qemu/hw/riscv/virt-acpi-build.c
/openbmc/qemu/hw/rtc/ls7a_rtc.c
/openbmc/qemu/hw/scsi/esp.c
/openbmc/qemu/hw/scsi/scsi-disk.c
/openbmc/qemu/hw/scsi/vhost-scsi.c
/openbmc/qemu/hw/scsi/vhost-user-scsi.c
/openbmc/qemu/hw/sd/sd.c
/openbmc/qemu/hw/sd/sdhci.c
/openbmc/qemu/hw/smbios/smbios.c
/openbmc/qemu/hw/ssi/Kconfig
/openbmc/qemu/hw/ssi/aspeed_smc.c
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/openbmc/qemu/hw/ssi/pnv_spi.c
/openbmc/qemu/hw/ssi/trace-events
/openbmc/qemu/hw/timer/hpet.c
/openbmc/qemu/hw/timer/trace-events
/openbmc/qemu/hw/vfio/ap.c
/openbmc/qemu/hw/vfio/ccw.c
/openbmc/qemu/hw/vfio/common.c
/openbmc/qemu/hw/vfio/container.c
/openbmc/qemu/hw/vfio/helpers.c
/openbmc/qemu/hw/vfio/iommufd.c
/openbmc/qemu/hw/vfio/migration.c
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/openbmc/qemu/hw/virtio/trace-events
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/openbmc/qemu/hw/virtio/vhost-user-vsock.c
/openbmc/qemu/hw/virtio/virtio-crypto.c
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/openbmc/qemu/hw/virtio/virtio-rng.c
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/openbmc/qemu/include/block/graph-lock.h
/openbmc/qemu/include/block/nvme.h
/openbmc/qemu/include/chardev/char-fe.h
/openbmc/qemu/include/crypto/tlssession.h
/openbmc/qemu/include/exec/cpu-common.h
/openbmc/qemu/include/exec/cpu_ldst.h
/openbmc/qemu/include/exec/exec-all.h
/openbmc/qemu/include/exec/gdbstub.h
/openbmc/qemu/include/gdbstub/commands.h
/openbmc/qemu/include/hw/acpi/cpu.h
/openbmc/qemu/include/hw/acpi/generic_event_device.h
/openbmc/qemu/include/hw/adc/aspeed_adc.h
/openbmc/qemu/include/hw/arm/aspeed_soc.h
/openbmc/qemu/include/hw/boards.h
/openbmc/qemu/include/hw/core/cpu.h
/openbmc/qemu/include/hw/cxl/cxl_device.h
/openbmc/qemu/include/hw/cxl/cxl_mailbox.h
/openbmc/qemu/include/hw/i2c/aspeed_i2c.h
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/openbmc/qemu/include/hw/intc/loongarch_extioi.h
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/openbmc/qemu/include/hw/misc/aspeed_scu.h
/openbmc/qemu/include/hw/pci/pci.h
/openbmc/qemu/include/hw/pci/pci_device.h
/openbmc/qemu/include/hw/pci/pcie_doe.h
/openbmc/qemu/include/hw/pci/pcie_sriov.h
/openbmc/qemu/include/hw/ppc/pnv.h
/openbmc/qemu/include/hw/ppc/pnv_adu.h
/openbmc/qemu/include/hw/ppc/pnv_chip.h
/openbmc/qemu/include/hw/ppc/pnv_core.h
/openbmc/qemu/include/hw/ppc/pnv_lpc.h
/openbmc/qemu/include/hw/ppc/pnv_xscom.h
/openbmc/qemu/include/hw/ppc/spapr.h
/openbmc/qemu/include/hw/ppc/xive2_regs.h
/openbmc/qemu/include/hw/ssi/pnv_spi.h
/openbmc/qemu/include/hw/ssi/pnv_spi_regs.h
/openbmc/qemu/include/hw/vfio/vfio-common.h
/openbmc/qemu/include/hw/virtio/virtio-iommu.h
/openbmc/qemu/include/hw/virtio/virtio.h
/openbmc/qemu/include/io/channel.h
/openbmc/qemu/include/qemu/fifo8.h
/openbmc/qemu/include/qemu/osdep.h
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/openbmc/qemu/include/semihosting/syscalls.h
/openbmc/qemu/include/sysemu/host_iommu_device.h
/openbmc/qemu/include/sysemu/iommufd.h
/openbmc/qemu/include/sysemu/kvm.h
/openbmc/qemu/include/sysemu/kvm_int.h
/openbmc/qemu/include/sysemu/spdm-socket.h
/openbmc/qemu/io/channel-socket.c
/openbmc/qemu/io/channel-tls.c
/openbmc/qemu/io/channel.c
/openbmc/qemu/linux-headers/asm-powerpc/kvm.h
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/openbmc/qemu/linux-user/main.c
/openbmc/qemu/linux-user/syscall.c
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/openbmc/qemu/migration/file.c
/openbmc/qemu/migration/multifd.c
/openbmc/qemu/migration/savevm.c
/openbmc/qemu/net/net.c
/openbmc/qemu/net/tap.c
/openbmc/qemu/net/vhost-vdpa.c
/openbmc/qemu/pc-bios/opensbi-riscv32-generic-fw_dynamic.bin
/openbmc/qemu/pc-bios/opensbi-riscv64-generic-fw_dynamic.bin
/openbmc/qemu/plugins/loader.c
/openbmc/qemu/qapi/block-core.json
/openbmc/qemu/qapi/block-export.json
/openbmc/qemu/qapi/block.json
/openbmc/qemu/qapi/char.json
/openbmc/qemu/qapi/control.json
/openbmc/qemu/qapi/crypto.json
/openbmc/qemu/qapi/cxl.json
/openbmc/qemu/qapi/dump.json
/openbmc/qemu/qapi/ebpf.json
/openbmc/qemu/qapi/introspect.json
/openbmc/qemu/qapi/job.json
/openbmc/qemu/qapi/machine-target.json
/openbmc/qemu/qapi/machine.json
/openbmc/qemu/qapi/migration.json
/openbmc/qemu/qapi/misc.json
/openbmc/qemu/qapi/net.json
/openbmc/qemu/qapi/pci.json
/openbmc/qemu/qapi/qdev.json
/openbmc/qemu/qapi/qom.json
/openbmc/qemu/qapi/rocker.json
/openbmc/qemu/qapi/run-state.json
/openbmc/qemu/qapi/sockets.json
/openbmc/qemu/qapi/stats.json
/openbmc/qemu/qapi/transaction.json
/openbmc/qemu/qapi/ui.json
/openbmc/qemu/qapi/vfio.json
/openbmc/qemu/qapi/virtio.json
/openbmc/qemu/qemu-options.hx
/openbmc/qemu/qga/commands-bsd.c
/openbmc/qemu/qga/commands-common.h
/openbmc/qemu/qga/commands-linux.c
/openbmc/qemu/qga/commands-posix.c
/openbmc/qemu/qga/commands-win32.c
/openbmc/qemu/qga/main.c
/openbmc/qemu/qga/qapi-schema.json
/openbmc/qemu/roms/opensbi
/openbmc/qemu/semihosting/Kconfig
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/openbmc/qemu/system/cpus.c
/openbmc/qemu/system/memory_mapping.c
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/openbmc/qemu/system/vl.c
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/openbmc/qemu/target/arm/gdbstub.c
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/openbmc/qemu/target/arm/hvf/hvf.c
/openbmc/qemu/target/arm/internals.h
/openbmc/qemu/target/arm/kvm.c
/openbmc/qemu/target/arm/tcg/helper-a64.c
/openbmc/qemu/target/arm/tcg/helper-sme.h
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/openbmc/qemu/target/arm/tcg/sve_helper.c
/openbmc/qemu/target/arm/tcg/translate-sme.c
/openbmc/qemu/target/arm/tcg/translate-sve.c
/openbmc/qemu/target/hexagon/gdbstub.c
/openbmc/qemu/target/hexagon/op_helper.c
/openbmc/qemu/target/i386/cpu.c
/openbmc/qemu/target/i386/cpu.h
/openbmc/qemu/target/i386/kvm/kvm.c
/openbmc/qemu/target/i386/kvm/meson.build
/openbmc/qemu/target/i386/kvm/vmsr_energy.c
/openbmc/qemu/target/i386/kvm/vmsr_energy.h
/openbmc/qemu/target/i386/sev.c
/openbmc/qemu/target/i386/tcg/decode-new.c.inc
/openbmc/qemu/target/i386/tcg/seg_helper.c
/openbmc/qemu/target/i386/tcg/translate.c
/openbmc/qemu/target/loongarch/tcg/tlb_helper.c
/openbmc/qemu/target/m68k/Kconfig
/openbmc/qemu/target/m68k/helper.c
/openbmc/qemu/target/m68k/meson.build
/openbmc/qemu/target/m68k/semihosting-stub.c
/openbmc/qemu/target/mips/Kconfig
/openbmc/qemu/target/mips/tcg/sysemu/meson.build
/openbmc/qemu/target/mips/tcg/sysemu/semihosting-stub.c
/openbmc/qemu/target/ppc/arch_dump.c
/openbmc/qemu/target/ppc/cpu.h
/openbmc/qemu/target/ppc/cpu_init.c
/openbmc/qemu/target/ppc/excp_helper.c
/openbmc/qemu/target/ppc/fpu_helper.c
/openbmc/qemu/target/ppc/helper.h
/openbmc/qemu/target/ppc/insn32.decode
/openbmc/qemu/target/ppc/int_helper.c
/openbmc/qemu/target/ppc/kvm.c
/openbmc/qemu/target/ppc/mem_helper.c
/openbmc/qemu/target/ppc/misc_helper.c
/openbmc/qemu/target/ppc/mmu-book3s-v3.c
/openbmc/qemu/target/ppc/mmu-book3s-v3.h
/openbmc/qemu/target/ppc/mmu-hash32.c
/openbmc/qemu/target/ppc/mmu-hash32.h
/openbmc/qemu/target/ppc/mmu-hash64.c
/openbmc/qemu/target/ppc/mmu-hash64.h
/openbmc/qemu/target/ppc/mmu-radix64.c
/openbmc/qemu/target/ppc/mmu-radix64.h
/openbmc/qemu/target/ppc/mmu_common.c
/openbmc/qemu/target/ppc/timebase_helper.c
/openbmc/qemu/target/ppc/translate.c
/openbmc/qemu/target/ppc/translate/vmx-impl.c.inc
/openbmc/qemu/target/ppc/translate/vmx-ops.c.inc
/openbmc/qemu/target/ppc/translate/vsx-impl.c.inc
/openbmc/qemu/target/ppc/translate/vsx-ops.c.inc
/openbmc/qemu/target/riscv/Kconfig
/openbmc/qemu/target/riscv/insn_trans/trans_rvd.c.inc
/openbmc/qemu/target/riscv/insn_trans/trans_rvf.c.inc
/openbmc/qemu/target/riscv/insn_trans/trans_rvi.c.inc
/openbmc/qemu/target/riscv/pmu.c
/openbmc/qemu/target/riscv/vector_helper.c
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/openbmc/qemu/target/sparc/ldst_helper.c
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/openbmc/qemu/target/xtensa/mmu_helper.c
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/openbmc/qemu/tests/Makefile.include
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/openbmc/qemu/tests/tcg/plugins/meson.build
/openbmc/qemu/tests/tcg/plugins/syscall.c
/openbmc/qemu/tests/tcg/ppc64/Makefile.target
/openbmc/qemu/tests/tcg/riscv64/Makefile.softmmu-target
/openbmc/qemu/tests/tcg/s390x/Makefile.softmmu-target
/openbmc/qemu/tests/tcg/x86_64/Makefile.softmmu-target
/openbmc/qemu/tests/unit/crypto-tls-psk-helpers.c
/openbmc/qemu/tests/unit/crypto-tls-x509-helpers.c
/openbmc/qemu/tests/unit/crypto-tls-x509-helpers.h
/openbmc/qemu/tests/unit/meson.build
/openbmc/qemu/tests/unit/pkix_asn1_tab.c.inc
/openbmc/qemu/tests/unit/test-crypto-tlssession.c
/openbmc/qemu/tests/vm/generated/freebsd.json
/openbmc/qemu/tests/vm/openbsd
/openbmc/qemu/tools/i386/qemu-vmsr-helper.c
/openbmc/qemu/tools/i386/rapl-msr-index.h
/openbmc/qemu/ui/clipboard.c
/openbmc/qemu/ui/console-vc.c
/openbmc/qemu/ui/console.c
/openbmc/qemu/ui/cursor.c
/openbmc/qemu/ui/dbus-clipboard.c
/openbmc/qemu/ui/gtk.c
/openbmc/qemu/ui/trace-events
/openbmc/qemu/ui/vdagent.c
/openbmc/qemu/ui/vnc.h
/openbmc/qemu/util/async.c
/openbmc/qemu/util/cpuinfo-aarch64.c
/openbmc/qemu/util/cpuinfo-ppc.c
/openbmc/qemu/util/fifo8.c
/openbmc/qemu/util/getauxval.c
/openbmc/qemu/util/oslib-posix.c
1c15dd6310-Jul-2024 Song Gao <gaosong@loongson.cn>

target/loongarch/gdbstub: Add vector registers support

GDB already support LoongArch vector extension[1], QEMU gdb adds
LoongArch vector registers support, so that users can use 'info all-registers'

target/loongarch/gdbstub: Add vector registers support

GDB already support LoongArch vector extension[1], QEMU gdb adds
LoongArch vector registers support, so that users can use 'info all-registers'
to get all vector registers values.

[1]: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=1e9569f383a3d5a88ee07d0c2401bd95613c222e

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewd-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240711024454.3075183-1-gaosong@loongson.cn>

show more ...


/openbmc/qemu/MAINTAINERS
/openbmc/qemu/README.rst
/openbmc/qemu/accel/kvm/kvm-all.c
/openbmc/qemu/accel/tcg/cpu-exec.c
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loongarch-lasx.xml
loongarch-lsx.xml
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/openbmc/qemu/hw/arm/smmuv3-internal.h
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/openbmc/qemu/hw/arm/stm32l4x5_soc.c
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/openbmc/qemu/hw/display/ati.c
/openbmc/qemu/hw/display/bcm2835_fb.c
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/openbmc/qemu/hw/display/vmware_vga.c
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/openbmc/qemu/target/riscv/insn_trans/trans_rvf.c.inc
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/openbmc/qemu/target/riscv/insn_trans/trans_rvzabha.c.inc
/openbmc/qemu/target/riscv/insn_trans/trans_rvzacas.c.inc
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/openbmc/qemu/target/riscv/machine.c
/openbmc/qemu/target/riscv/op_helper.c
/openbmc/qemu/target/riscv/pmu.c
/openbmc/qemu/target/riscv/pmu.h
/openbmc/qemu/target/riscv/tcg/tcg-cpu.c
/openbmc/qemu/target/riscv/translate.c
/openbmc/qemu/target/rx/cpu.c
/openbmc/qemu/target/s390x/cpu.c
/openbmc/qemu/target/sh4/cpu.c
/openbmc/qemu/target/sparc/cpu.c
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/openbmc/qemu/target/xtensa/cpu.c
/openbmc/qemu/tests/avocado/machine_aspeed.py
/openbmc/qemu/tests/docker/dockerfiles/python.docker
/openbmc/qemu/tests/qapi-schema/doc-empty-section.err
/openbmc/qemu/tests/qapi-schema/doc-empty-section.json
/openbmc/qemu/tests/qapi-schema/doc-good.json
/openbmc/qemu/tests/qapi-schema/doc-good.out
/openbmc/qemu/tests/qapi-schema/doc-good.txt
/openbmc/qemu/tests/qapi-schema/doc-interleaved-section.json
/openbmc/qemu/tests/qemu-iotests/245
/openbmc/qemu/tests/qemu-iotests/testenv.py
/openbmc/qemu/tests/qemu-iotests/testrunner.py
/openbmc/qemu/tests/qemu-iotests/tests/write-zeroes-unmap
/openbmc/qemu/tests/qemu-iotests/tests/write-zeroes-unmap.out
/openbmc/qemu/tests/qtest/arm-cpu-features.c
/openbmc/qemu/tests/qtest/libqos/sdhci-cmd.h
/openbmc/qemu/tests/qtest/npcm7xx_sdhci-test.c
/openbmc/qemu/tests/tcg/aarch64/Makefile.target
/openbmc/qemu/tests/tcg/aarch64/gdbstub/test-mte.py
/openbmc/qemu/tests/tcg/aarch64/mte-8.c
/openbmc/qemu/tests/tcg/aarch64/sme-fmopa-1.c
/openbmc/qemu/tests/tcg/aarch64/sme-fmopa-2.c
/openbmc/qemu/tests/tcg/aarch64/sme-fmopa-3.c
/openbmc/qemu/ui/cocoa.m
/openbmc/qemu/ui/console.c
/openbmc/qemu/ui/dbus-listener.c
/openbmc/qemu/ui/gtk.c
/openbmc/qemu/ui/sdl2.c
/openbmc/qemu/ui/spice-display.c
/openbmc/qemu/ui/vnc.c
/openbmc/qemu/util/oslib-posix.c
f81198ce05-Jul-2024 Gustavo Romero <gustavo.romero@linaro.org>

gdbstub: Add support for MTE in user mode

This commit implements the stubs to handle the qIsAddressTagged,
qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag'
subcommands to work with QE

gdbstub: Add support for MTE in user mode

This commit implements the stubs to handle the qIsAddressTagged,
qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag'
subcommands to work with QEMU gdbstub on aarch64 user mode. It also
implements the get/set functions for the special GDB MTE register
'tag_ctl', used to control the MTE fault type at runtime.

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-Id: <20240628050850.536447-11-gustavo.romero@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-40-alex.bennee@linaro.org>

show more ...


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/openbmc/qemu/.gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml
/openbmc/qemu/.gitlab-ci.d/opensbi.yml
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/openbmc/qemu/util/rcu.c
/openbmc/qemu/util/readline.c
/openbmc/qemu/util/userfaultfd.c
/openbmc/qemu/util/vhost-user-server.c
/openbmc/qemu/util/yank.c
940bb5fa06-Nov-2023 Alex Bennée <alex.bennee@linaro.org>

gdb-xml: fix duplicate register in arm-neon.xml

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Fixes: 56aebc8916 ("Add GDB XML register description support")
Reviewed-by: Philippe Mat

gdb-xml: fix duplicate register in arm-neon.xml

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Fixes: 56aebc8916 ("Add GDB XML register description support")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20231106185112.2755262-3-alex.bennee@linaro.org>

show more ...


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17ffe33108-Aug-2023 Jiajie Chen <c@jia.je>

target/loongarch: Split fcc register to fcc0-7 in gdbstub

Since GDB 13.1(GDB commit ea3352172), GDB LoongArch changed to use
fcc0-7 instead of fcc register. This commit partially reverts commit
2f14

target/loongarch: Split fcc register to fcc0-7 in gdbstub

Since GDB 13.1(GDB commit ea3352172), GDB LoongArch changed to use
fcc0-7 instead of fcc register. This commit partially reverts commit
2f149c759 (`target/loongarch: Update gdb_set_fpu() and gdb_get_fpu()`)
to match the behavior of GDB.

Note that it is a breaking change for GDB 13.0 or earlier, but it is
also required for GDB 13.1 or later to work.

Signed-off-by: Jiajie Chen <c@jia.je>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230808054315.3391465-1-c@jia.je>
Signed-off-by: Song Gao <gaosong@loongson.cn>

show more ...

ebda303621-Aug-2023 Jiajie Chen <c@jia.je>

target/loongarch: Add GDB support for loongarch32 mode

GPRs and PC are 32-bit wide in loongarch32 mode.

Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linar

target/loongarch: Add GDB support for loongarch32 mode

GPRs and PC are 32-bit wide in loongarch32 mode.

Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20230817093121.1053890-4-gaosong@loongson.cn>
[PMD: Rebased, set gdb_num_core_regs]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230821125959.28666-9-philmd@linaro.org>

show more ...


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b647652e04-May-2023 Taylor Simpson <tsimpson@quicinc.com>

Hexagon (gdbstub): add HVX support

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Co-authored-by: Brian Cain <bcain@quicinc.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: M

Hexagon (gdbstub): add HVX support

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Co-authored-by: Brian Cain <bcain@quicinc.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <17cb32f34d469f705c3cc066a3583935352ee048.1683214375.git.quic_mathbern@quicinc.com>

show more ...

ab930e8004-May-2023 Matheus Tavares Bernardino <quic_mathbern@quicinc.com>

Hexagon: add core gdbstub xml data for LLDB

Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <ts

Hexagon: add core gdbstub xml data for LLDB

Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <d25a3a79334d81f0e1ecfb438b6ee82585d02dc4.1683214375.git.quic_mathbern@quicinc.com>

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/openbmc/qemu/.gitlab-ci.d/custom-runners/ubuntu-22.04-aarch32.yml
/openbmc/qemu/.gitlab-ci.d/custom-runners/ubuntu-22.04-aarch64.yml
/openbmc/qemu/MAINTAINERS
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8afc43ea14-Mar-2023 Ilya Leoshkevich <iii@linux.ibm.com>

s390x/gdb: Split s390-virt.xml

Both TCG and KVM emulate ckc, cputm, last_break and prefix, and it's
quite useful to have them during debugging. Right now they are grouped
together with KVM-only pp,

s390x/gdb: Split s390-virt.xml

Both TCG and KVM emulate ckc, cputm, last_break and prefix, and it's
quite useful to have them during debugging. Right now they are grouped
together with KVM-only pp, pfault_token, pfault_select and
pfault_compare in s390-virt.xml, and are not available when debugging
TCG-emulated code.

Move KVM-only registers into the new s390-virt-kvm.xml file. Advertise
s390-virt.xml always, and the new s390-virt-kvm.xml only for KVM.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230314101813.174874-1-iii@linux.ibm.com>
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>

show more ...


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7bdd67a520-Apr-2023 Peter Maydell <peter.maydell@linaro.org>

target/arm: Report pauth information to gdb as 'pauth_v2'

So that we can avoid the "older gdb crashes" problem described in
commit 5787d17a42f7af4 and which caused us to disable reporting pauth
info

target/arm: Report pauth information to gdb as 'pauth_v2'

So that we can avoid the "older gdb crashes" problem described in
commit 5787d17a42f7af4 and which caused us to disable reporting pauth
information via the gdbstub, newer gdb is going to implement support
for recognizing the pauth information via a new feature name:
org.gnu.gdb.aarch64.pauth_v2

Older gdb won't recognize this feature name, so we can re-enable the
pauth support under the new name without risking them crashing.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230406150827.3322670-1-peter.maydell@linaro.org

show more ...


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e995d5cc27-Feb-2023 Richard Henderson <richard.henderson@linaro.org>

target/arm: Implement gdbstub pauth extension

The extension is primarily defined by the Linux kernel NT_ARM_PAC_MASK
ptrace register set.

The original gdb feature consists of two masks, data and co

target/arm: Implement gdbstub pauth extension

The extension is primarily defined by the Linux kernel NT_ARM_PAC_MASK
ptrace register set.

The original gdb feature consists of two masks, data and code, which are
used to mask out the authentication code within a pointer. Following
discussion with Luis Machado, add two more masks in order to support
pointers within the high half of the address space (i.e. TTBR1 vs TTBR0).

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1105
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


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c3bef3b430-Dec-2022 Richard Henderson <richard.henderson@linaro.org>

target/microblaze: Add gdbstub xml

Mirroring the upstream gdb xml files, the two stack boundary
registers are separated out.

Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Signed-off-by: Richa

target/microblaze: Add gdbstub xml

Mirroring the upstream gdb xml files, the two stack boundary
registers are separated out.

Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


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75ac231c13-Sep-2022 TaiseiIto <taisei1212@outlook.jp>

gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB

Before this commit, there were contradictory descriptions about size of EFER
register.
Line 113 says the size is 8 bytes.

gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB

Before this commit, there were contradictory descriptions about size of EFER
register.
Line 113 says the size is 8 bytes.
Line 129 says the size is 4 bytes.

As a result, when GDB is debugging an OS running on QEMU, the GDB cannot
read 'g' packets correctly. This 'g' packet transmits values of each
registers of machine emulated by QEMU to GDB. QEMU, the packet sender,
assign 4 bytes for EFER in 'g' packet based on the line 113.
GDB, the packet receiver, extract 8 bytes for EFER in 'g' packet based on
the line 129. Therefore, all registers located behind EFER in 'g' packet
has been shifted 4 bytes in GDB.

After this commit, GDB can read 'g' packets correctly.

Signed-off-by: TaiseiIto <taisei1212@outlook.jp>
Message-Id: <TY0PR0101MB4285F637209075C9F65FCDA6A4479@TY0PR0101MB4285.apcprd01.prod.exchangelabs.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


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4c0f0b6631-Aug-2022 Andrew Burgess <aburgess@redhat.com>

target/riscv: remove fixed numbering from GDB xml feature files

The fixed register numbering in the various GDB feature files for
RISC-V only exists because these files were originally copied from t

target/riscv: remove fixed numbering from GDB xml feature files

The fixed register numbering in the various GDB feature files for
RISC-V only exists because these files were originally copied from the
GDB source tree.

However, the fixed numbering only exists in the GDB source tree so
that GDB, when it connects to a target that doesn't provide a target
description, will use a specific numbering scheme.

That numbering scheme is designed to be compatible with the first
versions of QEMU (for RISC-V), that didn't send a target description,
and relied on a fixed numbering scheme.

Because of the way that QEMU manages its target descriptions,
recording the number of registers in each feature, and just relying on
GDB's numbering starting from 0, then I propose that we remove all the
fixed numbering from the RISC-V feature xml files, and just rely on
the standard numbering scheme. Plenty of other targets manage their
xml files this way, e.g. ARM, AArch64, Loongarch, m68k, rx, and s390.

Signed-off-by: Andrew Burgess <aburgess@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Message-Id: <6069395f90e6fc24dac92197be815fedf42f5974.1661934573.git.aburgess@redhat.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

show more ...

94452ac431-Aug-2022 Andrew Burgess <aburgess@redhat.com>

target/riscv: remove fflags, frm, and fcsr from riscv-*-fpu.xml

While testing some changes to GDB's handling for the RISC-V registers
fcsr, fflags, and frm, I spotted that QEMU includes these regist

target/riscv: remove fflags, frm, and fcsr from riscv-*-fpu.xml

While testing some changes to GDB's handling for the RISC-V registers
fcsr, fflags, and frm, I spotted that QEMU includes these registers
twice in the target description it sends to GDB, once in the fpu
feature, and once in the csr feature.

Right now things basically work OK, QEMU maps these registers onto two
different register numbers, e.g. fcsr maps to both 68 and 73, and GDB
can use either of these to access the register.

However, GDB's target descriptions don't really work this way, each
register should appear just once in a target description, mapping the
register name onto the number GDB should use when accessing the
register on the target. Duplicate register names actually result in
duplicate registers on the GDB side, however, as the registers have
the same name, the user can only access one of these registers.

Currently GDB has a hack in place, specifically for RISC-V, to spot
the duplicate copies of these three registers, and hide them from the
user, ensuring the user only ever sees a single copy of each.

In this commit I propose fixing this issue on the QEMU side, and in
the process, simplify the fpu register handling a little.

I think we should, remove fflags, frm, and fcsr from the two (32-bit
and 64-bit) fpu feature xml files. These files will only contain the
32 core floating point register f0 to f31. The fflags, frm, and fcsr
registers will continue to be advertised in the csr feature as they
currently are.

With that change made, I will simplify riscv_gdb_get_fpu and
riscv_gdb_set_fpu, removing the extra handling for the 3 status
registers.

Signed-off-by: Andrew Burgess <aburgess@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <0fbf2a5b12e3210ff3867d5cf7022b3f3462c9c8.1661934573.git.aburgess@redhat.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

show more ...


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/openbmc/qemu/.gitlab-ci.d/cirrus/freebsd-13.vars
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d182c39004-Aug-2022 Song Gao <gaosong@loongson.cn>

target/loongarch: Update loongarch-fpu.xml

Rename loongarch-fpu64.xml to loongarch-fpu.xml and update
loongarch-fpu.xml to match upstream GDB [1]

[1]:https://github.com/bminor/binutils-gdb/blob/mas

target/loongarch: Update loongarch-fpu.xml

Rename loongarch-fpu64.xml to loongarch-fpu.xml and update
loongarch-fpu.xml to match upstream GDB [1]

[1]:https://github.com/bminor/binutils-gdb/blob/master/gdb/features/loongarch/fpu.xml

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220805033523.1416837-5-gaosong@loongson.cn>

show more ...

96c3298c04-Aug-2022 Song Gao <gaosong@loongson.cn>

target/loongarch: update loongarch-base64.xml

Update loongarch-base64.xml to match the upstream GDB [1].

[1]:https://github.com/bminor/binutils-gdb/blob/master/gdb/features/loongarch/base64.xml

Re

target/loongarch: update loongarch-base64.xml

Update loongarch-base64.xml to match the upstream GDB [1].

[1]:https://github.com/bminor/binutils-gdb/blob/master/gdb/features/loongarch/base64.xml

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220805033523.1416837-4-gaosong@loongson.cn>

show more ...

1fe8ac3504-Aug-2022 Song Gao <gaosong@loongson.cn>

target/loongarch: Fix GDB get the wrong pc

GDB LoongArch add a register orig_a0, see the base64.xml [1].
We should add the orig_a0 to match the upstream GDB.

[1]: https://github.com/bminor/binutils

target/loongarch: Fix GDB get the wrong pc

GDB LoongArch add a register orig_a0, see the base64.xml [1].
We should add the orig_a0 to match the upstream GDB.

[1]: https://github.com/bminor/binutils-gdb/blob/master/gdb/features/loongarch/base64.xml

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220805033523.1416837-2-gaosong@loongson.cn>

show more ...


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ca61e75006-Jun-2022 Xiaojuan Yang <yangxiaojuan@loongson.cn>

target/loongarch: Add gdb support.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

target/loongarch: Add gdb support.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-42-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


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dbd9e08401-Nov-2021 Peter Maydell <peter.maydell@linaro.org>

target/arm: Advertise MVE to gdb when present

Cortex-M CPUs with MVE should advertise this fact to gdb, using the
org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR
register. Presence

target/arm: Advertise MVE to gdb when present

Cortex-M CPUs with MVE should advertise this fact to gdb, using the
org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR
register. Presence of this feature also tells gdb to create
pseudo-registers Q0..Q7, so we do not need to tell gdb about them
separately.

Note that unless you have a very recent GDB that includes this fix:
http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the
individual fields of the VPR register as zero (but showing the whole
thing as hex, eg with "print /x $vpr" will give the correct value).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


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b355f08a21-Sep-2021 Peter Maydell <peter.maydell@linaro.org>

target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML

Currently we send VFP XML which includes D0..D15 or D0..D31, plus
FPSID, FPSCR and FPEXC. The upstream GDB tolerates this, but its
d

target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML

Currently we send VFP XML which includes D0..D15 or D0..D31, plus
FPSID, FPSCR and FPEXC. The upstream GDB tolerates this, but its
definition of this XML feature does not include FPSID or FPEXC. In
particular, for M-profile cores there are no FPSID or FPEXC
registers, so advertising those is wrong.

Move FPSID and FPEXC into their own bit of XML which we only send for
A and R profile cores. This brings our definition of the XML
org.gnu.gdb.arm.vfp feature into line with GDB's own (at least for
non-Neon cores...) and means we don't claim to have FPSID and FPEXC
on M-profile.

(It seems unlikely to me that any gdbstub users really care about
being able to look at FPEXC and FPSID; but we've supplied them to gdb
for a decade and it's not hard to keep doing so.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210921162901.17508-5-peter.maydell@linaro.org

show more ...


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/openbmc/qemu/util/compatfd.c
/openbmc/qemu/util/coroutine-sigaltstack.c
/openbmc/qemu/util/crc-ccitt.c
/openbmc/qemu/util/cutils.c
/openbmc/qemu/util/event_notifier-posix.c
/openbmc/qemu/util/fifo8.c
/openbmc/qemu/util/guest-random.c
/openbmc/qemu/util/id.c
/openbmc/qemu/util/iov.c
/openbmc/qemu/util/keyval.c
/openbmc/qemu/util/main-loop.c
/openbmc/qemu/util/meson.build
/openbmc/qemu/util/mmap-alloc.c
/openbmc/qemu/util/module.c
/openbmc/qemu/util/osdep.c
/openbmc/qemu/util/oslib-posix.c
/openbmc/qemu/util/oslib-win32.c
/openbmc/qemu/util/qemu-co-shared-resource.c
/openbmc/qemu/util/qemu-config.c
/openbmc/qemu/util/qemu-coroutine-lock.c
/openbmc/qemu/util/qemu-coroutine-sleep.c
/openbmc/qemu/util/qemu-error.c
/openbmc/qemu/util/qemu-openpty.c
/openbmc/qemu/util/qemu-option.c
/openbmc/qemu/util/qemu-sockets.c
/openbmc/qemu/util/qemu-thread-posix.c
/openbmc/qemu/util/qemu-thread-win32.c
/openbmc/qemu/util/qemu-timer-common.c
/openbmc/qemu/util/qemu-timer.c
/openbmc/qemu/util/qsp.c
/openbmc/qemu/util/selfmap.c
/openbmc/qemu/util/trace-events
/openbmc/qemu/util/transactions.c
/openbmc/qemu/util/uri.c
/openbmc/qemu/util/userfaultfd.c
/openbmc/qemu/util/vfio-helpers.c
/openbmc/qemu/util/yank.c
138ca49a15-Jan-2021 Bin Meng <bin.meng@windriver.com>

target/riscv: Remove built-in GDB XML files for CSRs

Now that we have switched to generate the RISC-V CSR XML dynamically,
remove the built-in hardcoded XML files.

Signed-off-by: Bin Meng <bin.meng

target/riscv: Remove built-in GDB XML files for CSRs

Now that we have switched to generate the RISC-V CSR XML dynamically,
remove the built-in hardcoded XML files.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210116054123.5457-3-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

show more ...


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/openbmc/qemu/util/qemu-error.c
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/openbmc/qemu/util/qemu-option.c
/openbmc/qemu/util/qemu-print.c
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/openbmc/qemu/util/qemu-thread-win32.c
/openbmc/qemu/util/qemu-timer.c
/openbmc/qemu/util/qht.c
/openbmc/qemu/util/qsp.c
/openbmc/qemu/util/rcu.c
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/openbmc/qemu/util/trace-events
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/openbmc/qemu/util/vfio-helpers.c
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/openbmc/qemu/util/yank.c
/openbmc/qemu/version.rc
12b3540526-Jan-2020 Michael Rolnik <mrolnik@gmail.com>

target/avr: CPU class: Add GDB support

This includes GDB hooks for reading from wnd wrtiting to AVR
registers, and xml register definition file as well.

[AM: Split a larger AVR introduction patch i

target/avr: CPU class: Add GDB support

This includes GDB hooks for reading from wnd wrtiting to AVR
registers, and xml register definition file as well.

[AM: Split a larger AVR introduction patch into logical units]
Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Co-developed-by: Michael Rolnik <mrolnik@gmail.com>
Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[thuth: Fixed avr_cpu_gdb_read_register() parameter]
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-7-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...


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c888f7e007-May-2020 Peter Maydell <peter.maydell@linaro.org>

target/arm: Use correct GDB XML for M-profile cores

GDB's remote protocol requires M-profile cores to use the feature
name 'org.gnu.gdb.arm.m-profile' instead of the 'org.gnu.gdb.arm.core'
feature u

target/arm: Use correct GDB XML for M-profile cores

GDB's remote protocol requires M-profile cores to use the feature
name 'org.gnu.gdb.arm.m-profile' instead of the 'org.gnu.gdb.arm.core'
feature used for A- and R-profile cores. We weren't doing this, which
meant GDB treated our M-profile cores like A-profile ones. This mostly
doesn't matter, but for instance means that it doesn't correctly
handle backtraces where an M-profile exception frame is involved.

Ship a copy of GDB's arm-m-profile.xml and use it on the M-profile
cores. The integer registers have the same offsets as the
arm-core.xml, but register 25 is the M-profile XPSR rather than the
A-profile CPSR, so we need to update arm_cpu_gdb_read_register() and
arm_cpu_gdb_write_register() to handle XSPR reads and writes.

Fixes: https://bugs.launchpad.net/qemu/+bug/1877136
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200507134755.13997-1-peter.maydell@linaro.org

show more ...


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/openbmc/qemu/hw/s390x/s390-virtio-ccw.c
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/openbmc/qemu/include/block/block.h
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/openbmc/qemu/include/hw/misc/aspeed_scu.h
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/openbmc/qemu/include/hw/timer/nrf51_timer.h
/openbmc/qemu/include/sysemu/block-backend.h
/openbmc/qemu/include/tcg/tcg-op-gvec.h
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/openbmc/qemu/tests/qemu-iotests/check
/openbmc/qemu/tests/qemu-iotests/common.filter
/openbmc/qemu/tests/qemu-iotests/common.rc
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/openbmc/qemu/tests/qemu-iotests/pylintrc
a976ed3f30-Apr-2020 KONRAD Frederic <frederic.konrad@adacore.com>

target/m68k: fix gdb for m68xxx

Currently "cf-core.xml" is sent to GDB when using any m68k flavor. Thing is
it uses the "org.gnu.gdb.coldfire.core" feature name and gdb 8.3 then expects
a coldfire

target/m68k: fix gdb for m68xxx

Currently "cf-core.xml" is sent to GDB when using any m68k flavor. Thing is
it uses the "org.gnu.gdb.coldfire.core" feature name and gdb 8.3 then expects
a coldfire FPU instead of the default m68881 FPU.

This is not OK because the m68881 floats registers are 96 bits wide so it
crashes GDB with the following error message:

(gdb) target remote localhost:7960
Remote debugging using localhost:7960
warning: Register "fp0" has an unsupported size (96 bits)
warning: Register "fp1" has an unsupported size (96 bits)
...
Remote 'g' packet reply is too long (expected 148 bytes, got 180 bytes): \
00000000000[...]0000

With this patch: qemu-system-m68k -M none -cpu m68020 -s -S

(gdb) tar rem :1234
Remote debugging using :1234
warning: No executable has been specified and target does not support
determining executable automatically. Try using the "file" command.
0x00000000 in ?? ()
(gdb) p $fp0
$1 = nan(0xffffffffffffffff)

Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <1588094279-17913-3-git-send-email-frederic.konrad@adacore.com>
Message-Id: <20200430190122.4592-10-alex.bennee@linaro.org>

show more ...


/openbmc/qemu/.cirrus.yml
/openbmc/qemu/.github/lockdown.yml
/openbmc/qemu/.travis.yml
/openbmc/qemu/MAINTAINERS
/openbmc/qemu/Makefile
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/openbmc/qemu/tests/vm/freebsd
/openbmc/qemu/tests/vm/netbsd
/openbmc/qemu/tests/vm/openbsd
/openbmc/qemu/tests/vm/ubuntu.i386
/openbmc/qemu/tools/virtiofsd/fuse_lowlevel.h
/openbmc/qemu/tools/virtiofsd/helper.c
/openbmc/qemu/tools/virtiofsd/passthrough_ll.c
/openbmc/qemu/ui/gtk.c
/openbmc/qemu/ui/input-linux.c
/openbmc/qemu/ui/spice-display.c
/openbmc/qemu/util/Makefile.objs
/openbmc/qemu/util/aio-posix.c
/openbmc/qemu/util/aio-win32.c
/openbmc/qemu/util/async.c
/openbmc/qemu/util/bufferiszero.c
/openbmc/qemu/util/fdmon-io_uring.c
/openbmc/qemu/util/hbitmap.c
/openbmc/qemu/util/log.c
/openbmc/qemu/util/module.c
/openbmc/qemu/util/oslib-posix.c
/openbmc/qemu/util/qemu-option.c
/openbmc/qemu/util/qemu-sockets.c
/openbmc/qemu/util/qemu-timer.c
/openbmc/qemu/util/rcu.c
/openbmc/qemu/util/selfmap.c
/openbmc/qemu/util/systemd.c
/openbmc/qemu/util/thread-pool.c
/openbmc/qemu/util/vfio-helpers.c

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