16017c48 | 12-Jan-2015 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Clarify license status
The code in the softfloat source files is under a mixture of licenses: the original code and many changes from QEMU contributors are under the base SoftFloat-2a lic
softfloat: Clarify license status
The code in the softfloat source files is under a mixture of licenses: the original code and many changes from QEMU contributors are under the base SoftFloat-2a license; changes from Stefan Weil and RedHat employees are GPLv2-or-later; changes from Fabrice Bellard are under the BSD license. Clarify this in the comments at the top of each affected source file, including a statement about the assumed licensing for future contributions, so we don't need to remember to ask patch submitters explicitly to pick a license.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Andreas Färber <afaerber@suse.de> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Avi Kivity <avi.kivity@gmail.com> Acked-by: Ben Taylor <bentaylor.solx86@gmail.com> Acked-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Christophe Lyon <christophe.lyon@st.com> Acked-by: Fabrice Bellard <fabrice@bellard.org> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Juan Quintela <quintela@redhat.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Paul Brook <paul@codesourcery.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Richard Sandiford <rdsandiford@googlemail.com> Acked-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-5-git-send-email-peter.maydell@linaro.org
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332d5849 | 12-Jan-2015 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Revert and reimplement remaining parts of b645bb4885 and 5a6932d51d
Revert the parts of commits b645bb4885 and 5a6932d51d which are still in the codebase and under a SoftFloat-2b license.
softfloat: Revert and reimplement remaining parts of b645bb4885 and 5a6932d51d
Revert the parts of commits b645bb4885 and 5a6932d51d which are still in the codebase and under a SoftFloat-2b license.
Reimplement support for architectures where the most significant bit in the mantissa is 1 for a signaling NaN rather than a quiet NaN, by adding handling for SNAN_BIT_IS_ONE being set to the functions which test values for NaN-ness.
This includes restoring the bugfixes lost in the reversion where some of the float*_is_quiet_nan() functions were returning true for both signaling and quiet NaNs.
[This is a mechanical squashing together of two separate "revert" and "reimplement" patches.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-4-git-send-email-peter.maydell@linaro.org
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6bb8e0f1 | 12-Jan-2015 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Revert and reimplement remaining portions of 75d62a5856 and 3430b0be36f
Revert the remaining portions of commits 75d62a5856 and 3430b0be36f which are under a SoftFloat-2b license, ie the
softfloat: Revert and reimplement remaining portions of 75d62a5856 and 3430b0be36f
Revert the remaining portions of commits 75d62a5856 and 3430b0be36f which are under a SoftFloat-2b license, ie the functions uint64_to_float32() and uint64_to_float64(). (The float64_to_uint64() and float64_to_uint64_round_to_zero() functions were completely rewritten in commits fb3ea83aa and 0a87a3107d so can stay.)
Reimplement from scratch the uint64_to_float64() and uint64_to_float32() conversion functions.
[This is a mechanical squashing together of two separate "revert" and "reimplement" patches.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-3-git-send-email-peter.maydell@linaro.org
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f9288a76 | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Add support for ties-away rounding
IEEE754-2008 specifies a new rounding mode:
"roundTiesToAway: the floating-point number nearest to the infinitely precise result shall be delivered; if
softfloat: Add support for ties-away rounding
IEEE754-2008 specifies a new rounding mode:
"roundTiesToAway: the floating-point number nearest to the infinitely precise result shall be delivered; if the two nearest floating-point numbers bracketing an unrepresentable infinitely precise result are equally near, the one with larger magnitude shall be delivered."
Implement this new mode (it is needed for ARM). The general principle is that the required code is exactly like the ties-to-even code, except that we do not need to do the "in case of exact tie clear LSB to round-to-even", because the rounding operation naturally causes the exact tie to round up in magnitude.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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dc355b76 | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Refactor code handling various rounding modes
Refactor the code in various functions which calculates rounding increments given the current rounding mode, so that instead of a set of nest
softfloat: Refactor code handling various rounding modes
Refactor the code in various functions which calculates rounding increments given the current rounding mode, so that instead of a set of nested if statements we have a simple switch statement. This will give us a clean place to add the case for the new tiesAway rounding mode.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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14c9a07e | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Add float16 <=> float64 conversion functions
Add the conversion functions float16_to_float64() and float64_to_float16(), which will be needed for the ARM A64 instruction set.
Signed-off-
softfloat: Add float16 <=> float64 conversion functions
Add the conversion functions float16_to_float64() and float64_to_float16(), which will be needed for the ARM A64 instruction set.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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c4a1c5e7 | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
In preparation for adding conversions between float16 and float64, factor out code currently done inline in the float16<=>floa
softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
In preparation for adding conversions between float16 and float64, factor out code currently done inline in the float16<=>float32 conversion functions into functions RoundAndPackFloat16 and NormalizeFloat16Subnormal along the lines of the existing versions for the other float types.
Note that we change the handling of zExp from the inline code to match the API of the other RoundAndPackFloat functions; however we leave the positioning of the binary point between bits 22 and 23 rather than shifting it up to the high end of the word.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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879d096b | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Provide complete set of accessors for fp state
Tidy up the get/set accessors for the fp state to add missing ones and make them all inline in softfloat.h rather than some inline and some
softfloat: Provide complete set of accessors for fp state
Tidy up the get/set accessors for the fp state to add missing ones and make them all inline in softfloat.h rather than some inline and some not.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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fd728f2f | 07-Jan-2014 |
Tom Musta <tommusta@gmail.com> |
softfloat: Fix float64_to_uint32_round_to_zero
The float64_to_uint32_round_to_zero routine is incorrect.
For example, the following test pattern:
425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38
will
softfloat: Fix float64_to_uint32_round_to_zero
The float64_to_uint32_round_to_zero routine is incorrect.
For example, the following test pattern:
425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38
will erroneously set the inexact flag.
This patch re-implements the routine to use the float64_to_uint64_round_to_zero routine. If saturation occurs we ignore any flags set by the conversion function and raise only Invalid.
This contribution can be licensed under either the softfloat-2a or -2b license.
Signed-off-by: Tom Musta <tommusta@gmail.com> Message-id: 1387397961-4894-6-git-send-email-tommusta@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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5e7f654f | 07-Jan-2014 |
Tom Musta <tommusta@gmail.com> |
softfloat: Fix float64_to_uint32
The float64_to_uint32 has several flaws:
- for numbers between 2**32 and 2**64, the inexact exception flag may get incorrectly set. In this case, only the inva
softfloat: Fix float64_to_uint32
The float64_to_uint32 has several flaws:
- for numbers between 2**32 and 2**64, the inexact exception flag may get incorrectly set. In this case, only the invalid flag should be set.
test pattern: 425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38
- for numbers between 2**63 and 2**64, incorrect results may be produced:
test pattern: 43EAAF73F1F0B8BD / 0x1.aaf73f1f0b8bdp+63
This patch re-implements float64_to_uint32 to re-use the float64_to_uint64 routine (instead of float64_to_int64). For the saturation case, we ignore any flags which the conversion routine has set and raise only the invalid flag.
This contribution can be licensed under either the softfloat-2a or -2b license.
Signed-off-by: Tom Musta <tommusta@gmail.com> Message-id: 1387397961-4894-5-git-send-email-tommusta@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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0a87a310 | 07-Jan-2014 |
Tom Musta <tommusta@gmail.com> |
softfloat: Fix float64_to_uint64_round_to_zero
The float64_to_uint64_round_to_zero routine is incorrect.
For example, the following test pattern:
46697351FF4AEC29 / 0x1.97351ff4aec29p+103
cur
softfloat: Fix float64_to_uint64_round_to_zero
The float64_to_uint64_round_to_zero routine is incorrect.
For example, the following test pattern:
46697351FF4AEC29 / 0x1.97351ff4aec29p+103
currently produces 8000000000000000 instead of FFFFFFFFFFFFFFFF.
This patch re-implements the routine to temporarily force the rounding mode and use the float64_to_uint64 routine.
This contribution can be licensed under either the softfloat-2a or -2b license.
Signed-off-by: Tom Musta <tommusta@gmail.com> Message-id: 1387397961-4894-4-git-send-email-tommusta@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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2f18bbf9 | 07-Jan-2014 |
Tom Musta <tommusta@gmail.com> |
softfloat: Add float32_to_uint64()
This patch adds the float32_to_uint64() routine, which converts a 32-bit floating point number to an unsigned 64 bit number.
This contribution can be licensed und
softfloat: Add float32_to_uint64()
This patch adds the float32_to_uint64() routine, which converts a 32-bit floating point number to an unsigned 64 bit number.
This contribution can be licensed under either the softfloat-2a or -2b license.
Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: removed harmless but silly int64_t casts] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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3c85c37f | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Fix factor 2 error for scalbn on denormal inputs
If the input to float*_scalbn() is denormal then it represents a number 0.[mantissabits] * 2^(1-exponentbias) (and the actual exponent fie
softfloat: Fix factor 2 error for scalbn on denormal inputs
If the input to float*_scalbn() is denormal then it represents a number 0.[mantissabits] * 2^(1-exponentbias) (and the actual exponent field is all zeroes). This means that when we convert it to our unpacked encoding the unpacked exponent must be one greater than for a normal number, which represents 1.[mantissabits] * 2^(e-exponentbias) for an exponent field e.
This meant we were giving answers too small by a factor of 2 for all denormal inputs.
Note that the float-to-int routines also have this behaviour of not adjusting the exponent for denormals; however there it is harmless because denormals will all convert to integer zero anyway.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net>
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34e1c27b | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Only raise Invalid when conversions to int are out of range
We implement a number of float-to-integer conversions using conversion to an integer type with a wider range and then a check a
softfloat: Only raise Invalid when conversions to int are out of range
We implement a number of float-to-integer conversions using conversion to an integer type with a wider range and then a check against the narrower range we are actually converting to. If we find the result to be out of range we correctly raise the Invalid exception, but we must also suppress other exceptions which might have been raised by the conversion function we called.
This won't throw away exceptions we should have preserved, because for the 'core' exception flags the IEEE spec mandates that the only valid combinations of exception that can be raised by a single operation are Inexact + Overflow and Inexact + Underflow. For the non-IEEE softfloat flag for input denormals, we can guarantee that that flag won't have been set for out of range float-to-int conversions because a squashed denormal by definition goes to plus or minus zero, which is always in range after conversion to integer zero.
This bug has been fixed for some of the float-to-int conversion routines by previous patches; fix it for the remaining functions as well, so that they all restore the pre-conversion status flags prior to raising Invalid.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net>
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fb3ea83a | 07-Jan-2014 |
Tom Musta <tommusta@gmail.com> |
softfloat: Fix float64_to_uint64
The comment preceding the float64_to_uint64 routine suggests that the implementation is broken. And this is, indeed, the case.
This patch properly implements the c
softfloat: Fix float64_to_uint64
The comment preceding the float64_to_uint64 routine suggests that the implementation is broken. And this is, indeed, the case.
This patch properly implements the conversion of a 64-bit floating point number to an unsigned, 64 bit integer.
This contribution can be licensed under either the softfloat-2a or -2b license.
Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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c4850f9e | 07-Jan-2014 |
Peter Maydell <peter.maydell@linaro.org> |
softfloat: Make the int-to-float functions take exact-width types
Currently the int-to-float functions take types which are specified as "at least X bits wide", rather than "exactly X bits wide". Th
softfloat: Make the int-to-float functions take exact-width types
Currently the int-to-float functions take types which are specified as "at least X bits wide", rather than "exactly X bits wide". This is confusing and unhelpful since it means that the callers have to include an explicit cast to [u]intXX_t to ensure the correct behaviour. Fix them all to take the exactly-X-bits-wide types instead.
Note that this doesn't change behaviour at all since at the moment we happen to define the 'int32' and 'uint32' types as exactly 32 bits wide, and the 'int64' and 'uint64' types as exactly 64 bits wide.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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f581bf54 | 07-Jan-2014 |
Will Newton <will.newton@linaro.org> |
softfloat: Add float to 16bit integer conversions.
ARMv8 requires support for converting 32 and 64bit floating point values to signed and unsigned 16bit integers.
Signed-off-by: Will Newton <will.n
softfloat: Add float to 16bit integer conversions.
ARMv8 requires support for converting 32 and 64bit floating point values to signed and unsigned 16bit integers.
Signed-off-by: Will Newton <will.newton@linaro.org> [PMM: updated not to incorrectly set Inexact for Invalid inputs] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
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