softfloat: Use pointers with ftype_pack_raw

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

softfloat: Use pointers with pack_raw

At the same time, rename to pack_raw64.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

softfloat: Use pointers with ftype_unpack_raw

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

softfloat: Use pointers with unpack_raw

At the same time, rename to unpack_raw64.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-

softfloat: Use pointers with unpack_raw

At the same time, rename to unpack_raw64.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Use pointers with parts_default_nan

At the same time, rename to parts64_default_nan and add a
macro for parts_default_nan. This will be flushed out once
128-bit support is added.

Review

softfloat: Use pointers with parts_default_nan

At the same time, rename to parts64_default_nan and add a
macro for parts_default_nan. This will be flushed out once
128-bit support is added.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Move type-specific pack/unpack routines

In preparation from moving sf_canonicalize.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Hildenbrand <david@redhat.com

softfloat: Move type-specific pack/unpack routines

In preparation from moving sf_canonicalize.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Rename FloatParts to FloatParts64

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henders

softfloat: Rename FloatParts to FloatParts64

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Do not produce a default_nan from parts_silence_nan

Require default_nan_mode to be set instead.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@re

softfloat: Do not produce a default_nan from parts_silence_nan

Require default_nan_mode to be set instead.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: fix return_nan vs default_nan_mode

Do not call parts_silence_nan when default_nan_mode is in
effect. This will avoid an assert in a later patch.

Reviewed-by: Alex Bennée <alex.bennee@li

softfloat: fix return_nan vs default_nan_mode

Do not call parts_silence_nan when default_nan_mode is in
effect. This will avoid an assert in a later patch.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Use return_nan in float_to_float

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@li

softfloat: Use return_nan in float_to_float

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Add float_cmask and constants

Testing more than one class at a time is better done with masks.
This reduces the static branch count.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Rev

softfloat: Add float_cmask and constants

Testing more than one class at a time is better done with masks.
This reduces the static branch count.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Tidy a * b + inf return

No reason to set values in 'a', when we already
have float_class_inf in 'c', and can flip that sign.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewe

softfloat: Tidy a * b + inf return

No reason to set values in 'a', when we already
have float_class_inf in 'c', and can flip that sign.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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softfloat: Use float_raise in more places

We have been somewhat inconsistent about when to use
float_raise and when to or in the bit by hand.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
R

softfloat: Use float_raise in more places

We have been somewhat inconsistent about when to use
float_raise and when to or in the bit by hand.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

softfloat: Inline float_raise

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

softfloat: Move the binary point to the msb

Rather than point the binary point at msb-1, put it at the msb.
Use uadd64_overflow to detect when addition overflows instead
of DECOMPOSED_OVERFLOW_BIT.

softfloat: Move the binary point to the msb

Rather than point the binary point at msb-1, put it at the msb.
Use uadd64_overflow to detect when addition overflows instead
of DECOMPOSED_OVERFLOW_BIT.

This reduces the number of special cases within the code, such
as shifting an int64_t either left or right during conversion.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into staging

Miscellaneous patches for 2021-05-12

# gpg: Signature made Wed 12 May 2021 17:22:15 BST
# gpg: us

Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into staging

Miscellaneous patches for 2021-05-12

# gpg: Signature made Wed 12 May 2021 17:22:15 BST
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-misc-2021-05-12:
Drop the deprecated unicore32 target
Drop the deprecated lm32 target
block: Drop the sheepdog block driver
Remove the deprecated moxie target
monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Drop the deprecated unicore32 target

Target unicore32 was deprecated in commit 8e4ff4a8d2b, v5.2.0. See
there for rationale.

Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Signed-off-by: Markus Armbruster

Drop the deprecated unicore32 target

Target unicore32 was deprecated in commit 8e4ff4a8d2b, v5.2.0. See
there for rationale.

Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210503084034.3804963-3-armbru@redhat.com>
Acked-by: Thomas Huth <thuth@redhat.com>

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Drop the deprecated lm32 target

Target lm32 was deprecated in commit d8498005122, v5.2.0. See there
for rationale.

Some of its code lives on in device models derived from milkymist
ones: hw/char/d

Drop the deprecated lm32 target

Target lm32 was deprecated in commit d8498005122, v5.2.0. See there
for rationale.

Some of its code lives on in device models derived from milkymist
ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c.

Cc: Michael Walle <michael@walle.cc>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210503084034.3804963-2-armbru@redhat.com>
Acked-by: Michael Walle <michael@walle.cc>
[Trivial conflicts resolved, reST markup fixed]

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Remove the deprecated moxie target

There are no known users of this CPU anymore, and there are no
binaries available online which could be used for regression tests,
so the code has likely completel

Remove the deprecated moxie target

There are no known users of this CPU anymore, and there are no
binaries available online which could be used for regression tests,
so the code has likely completely bit-rotten already. It's been
marked as deprecated since two releases now and nobody spoke up
that there is still a need to keep it, thus let's remove it now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210430160355.698194-1-thuth@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[Commit message typos fixed, trivial conflicts resolved]
Signed-off-by: Markus Armbruster <armbru@redhat.com>

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fpu/softfloat: set invalid excp flag for RISC-V muladd instructions

In IEEE 754-2008 spec:
Invalid operation exception is signaled when doing:
fusedMultiplyAdd(0, Inf, c) or fusedMultiplyAdd(Inf

fpu/softfloat: set invalid excp flag for RISC-V muladd instructions

In IEEE 754-2008 spec:
Invalid operation exception is signaled when doing:
fusedMultiplyAdd(0, Inf, c) or fusedMultiplyAdd(Inf, 0, c)
unless c is a quiet NaN; if c is a quiet NaN then it is
implementation defined whether the invalid operation exception
is signaled.

In RISC-V Unprivileged ISA spec:
The fused multiply-add instructions must set the invalid
operation exception flag when the multiplicands are Inf and
zero, even when the addend is a quiet NaN.

This commit set invalid operation execption flag for RISC-V when
multiplicands of muladd instructions are Inf and zero.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210420013150.21992-1-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

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Hexagon (target/hexagon) use softfloat default NaN and tininess

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richa

Hexagon (target/hexagon) use softfloat default NaN and tininess

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-11-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...