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2d57d522 |
| 17-Sep-2023 |
Tim Lee <timlee660101@gmail.com> |
tools/pci: refactor did variable for NuvotonPciBridge
Symptom: Host tool "burn_my_bmc" for in-band firmware update didn't work and exception is about PCI device cannot find in NPCM8xx platform.
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tools/pci: refactor did variable for NuvotonPciBridge
Symptom: Host tool "burn_my_bmc" for in-band firmware update didn't work and exception is about PCI device cannot find in NPCM8xx platform.
root@localhost:~# burn_my_bmc --command update --interface ipmipci --image test.sig --sig test.sig --type dummy
Sending over the firmware image. Opening the cleanup blob Committing to the cleanup blob Closing cleanup blob Exception received: Couldn't find supported PCI device
Root cause: There are new Nuvoton PCI device-id in NPCM8xx platform. The previous device-id 0x0750 is hardcode for NPCM7xx platform. However, NPCM8xx PCI device is using new device-id 0x0850. Thus, host tool will throw the exception from NotFoundException().
Solution: We need to refactor this "did" variable to make host tool "burn_my_bmc" can work well for these two kinds of PCI devices.
Tested: In-band firmware update can work well in NPCM8xx with did change to 0x0850. Here is the result of "lspci" from host side for refer it. root@localhost:~# lspci -v | grep d7: d7:01.0 Unassigned class [ff00]: Winbond Electronics Corp Device 0850 (rev 08) d7:02.0 Unassigned class [ff00]: Winbond Electronics Corp Device 0850 (rev 08)
Change-Id: I2917298f13b0bcd7de3b2ff71173c546ea3cb02b Signed-off-by: Tim Lee <timlee660101@gmail.com>
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28c00d6e |
| 27-Apr-2022 |
Patrick Williams <patrick@stwcx.xyz> |
span: switch to std
Reduce the dependency on stdplus' version of span now that we are using C++20 and use the one out of the STL instead.
Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Change-
span: switch to std
Reduce the dependency on stdplus' version of span now that we are using C++20 and use the one out of the STL instead.
Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Change-Id: I040ba1796d6f278353fbc990ea6b62314927951e
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b487eb47 |
| 16-Sep-2021 |
Willy Tu <wltu@google.com> |
phosphor-ipmi-flash: Fix all C++ warnings Change-Id: I89236b2dab88ca725e269bb8f5b2cbfd271e807a Signed-off-by: Willy Tu <wltu@google.com>
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49dd8ce2 |
| 03-Nov-2020 |
Willy Tu <wltu@google.com> |
tools: remove shadow field Rename pci for AspeedPciBridge and NuvotonPciBridge. Parameter 'pci' shadows member inherited from type 'PciAccessBridge' Signed-off-by: Willy Tu
tools: remove shadow field Rename pci for AspeedPciBridge and NuvotonPciBridge. Parameter 'pci' shadows member inherited from type 'PciAccessBridge' Signed-off-by: Willy Tu <wltu@google.com> Change-Id: I5cb136570764962c5b985f52fe87a4e0b89e5279
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8a9de245 |
| 30-Oct-2020 |
Willy Tu <wltu@google.com> |
Add option to skip p2a bridge disable Add a new constructor for P2aDataHandler with skipBridgeDisable bool to enable an option to skip disableBridge() in AspeedPciBridge and NuvotonP
Add option to skip p2a bridge disable Add a new constructor for P2aDataHandler with skipBridgeDisable bool to enable an option to skip disableBridge() in AspeedPciBridge and NuvotonPciBridge. Signed-off-by: Willy Tu <wltu@google.com> Change-Id: I439bbaa2b7295adc54a8aa98157db60a7e820837
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c1a30c04 |
| 09-Jun-2020 |
Benjamin Fair <benjaminfair@google.com> |
tools/pci: add Nuvoton bridge configuration The Nuvoton PCI device requires the Memory Space bit to be set in its command register in order to access the mailbox over MMIO. Sign
tools/pci: add Nuvoton bridge configuration The Nuvoton PCI device requires the Memory Space bit to be set in its command register in order to access the mailbox over MMIO. Signed-off-by: Benjamin Fair <benjaminfair@google.com> Change-Id: Ic262b907ae55c622999aa68891b618650ccad3f2
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e5aafa5b |
| 05-Jun-2020 |
Benjamin Fair <benjaminfair@google.com> |
tools/pci: refactor PCI bridge Use polymorphism to handle the differences between Aspeed and Nuvoton PCI devices. Add unit tests (now at 100% line coverage for tools/pci.cpp).
tools/pci: refactor PCI bridge Use polymorphism to handle the differences between Aspeed and Nuvoton PCI devices. Add unit tests (now at 100% line coverage for tools/pci.cpp). Signed-off-by: Benjamin Fair <benjaminfair@google.com> Change-Id: I43e63ec5eb9fce5fb0fc74e0e69667dd13b7433f
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c04c2c5c |
| 05-Jun-2020 |
Benjamin Fair <benjaminfair@google.com> |
tools/pci: replace pciutils with pciaccess The pciutils library has a license which is incompatible with ours, so switch to pciaccess instead since it's MIT-licensed. Signed-off
tools/pci: replace pciutils with pciaccess The pciutils library has a license which is incompatible with ours, so switch to pciaccess instead since it's MIT-licensed. Signed-off-by: Benjamin Fair <benjaminfair@google.com> Change-Id: Ie40580d9992f7c30d9fdc904f97c89057791b10e
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9b37b095 |
| 28-May-2020 |
Patrick Venture <venture@google.com> |
update gcc10 and clang-format10 Signed-off-by: Patrick Venture <venture@google.com> Change-Id: I72239b884615d26b2c4311c49a26e2eced0a1fb0
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Revision tags: v1.0 |
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24141611 |
| 03-May-2019 |
Patrick Venture <venture@google.com> |
tools: p2a: check aspeed bridge Check whether the pci-to-ahb bridge is enabled. It should be enabled because this comes after the firmware blob is opened for writing. Tested: V
tools: p2a: check aspeed bridge Check whether the pci-to-ahb bridge is enabled. It should be enabled because this comes after the firmware blob is opened for writing. Tested: Verified it reports the correct state of the value. Change-Id: I04bd21fdbf65938164f5845c0ec46e2231b17bd9 Signed-off-by: Patrick Venture <venture@google.com>
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b5bf0fc2 |
| 03-May-2019 |
Patrick Venture <venture@google.com> |
p2a: add initial p2a support (empty) Add initial pci-to-ahb host-side support, by just listing the aspeed pci devices. Tested: This dumped the aspeed PCI device listed on my tes
p2a: add initial p2a support (empty) Add initial pci-to-ahb host-side support, by just listing the aspeed pci devices. Tested: This dumped the aspeed PCI device listed on my test platform. Change-Id: I6dc4aeb3b38ec2f95bfd716bda2d8eb4786328ab Signed-off-by: Patrick Venture <venture@google.com>
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