clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda forma

clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda formatting also changed, so we have made changes to the
organization default style format to better handle lambda formatting.

See I5e08687e696dd240402a2780158664b7113def0e for updated style.
See Iea0776aaa7edd483fa395e23de25ebf5a6288f71 for clang-18 enablement.

Change-Id: I1d204ff0a167c43688f2217e9dee5504c71cd4f0
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Add SMP link support for Bonnell

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I69e9cec0e050fa207254d11ba3596858ed767432

Odyssey PLL unlock analysis plugin

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ia53910eecdcdeb836bd836039a509f00121a67f7

clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest

clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest .clang-format from the docs repository and reformat the
repository.

Change-Id: I27b0d1357211259edb6ec2776924729052f238d6
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Ignore analysis of OCMBs that have been masked

Attentions from OCMBs chip will flow through their connected processor
chips. We should not do analysis of those attentions if they are masked
on the c

Ignore analysis of OCMBs that have been masked

Attentions from OCMBs chip will flow through their connected processor
chips. We should not do analysis of those attentions if they are masked
on the connected processor chip regardless if the OCMB chip shows any
active attentions. This will take care of scenarios like a channel
failure attention that has already been handled and masked by the host
firmware.

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I2c170ea4770ad3a229c1c65fa50b056fc8a6e4b2

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Add support for getting a connected peer from IOHS or SMPGROUP

This adds getConnectedTarget support to get a connected peer
target that is across a bus from a provided IOHS or
SMPGROUP/IOLINK target

Add support for getting a connected peer from IOHS or SMPGROUP

This adds getConnectedTarget support to get a connected peer
target that is across a bus from a provided IOHS or
SMPGROUP/IOLINK target

Signed-off-by: Caleb Palmer <cnpalmer@us.ibm.com>
Change-Id: I00320cf604ea21023b702fc984efd83f137ab36d

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Add simulated SCOM/CFAM read support for test

Change-Id: I615f1819cd309528735d63f2e6e4b4181c58fd34
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

callout rule for TOD fault analysis

This does not include actual callout support, just the rules when an
callout is needed. The actual callouts will come in subsequent commits
after adding support t

callout rule for TOD fault analysis

This does not include actual callout support, just the rules when an
callout is needed. The actual callouts will come in subsequent commits
after adding support to query the TOD configuration registers.

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I72c702a778e12ee20555f3e6dca77e0b6f023be7

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pdbg util to get chip/unit target from unit/chip

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Ia5c72c5667b7f6eb1ecb02c044dca5208a211c70

plugin for LPC timeout callouts

Change-Id: I39fed3c1ba5a16283c33c5072479f24c9c69a208
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

Move getConnectedTarget() to generic pdbg util

This was a helper function specific to the resolution code. Instead, it
should be a generic utility function for anyone to use.

Change-Id: Ic52fb5cc45

Move getConnectedTarget() to generic pdbg util

This was a helper function specific to the resolution code. Instead, it
should be a generic utility function for anyone to use.

Change-Id: Ic52fb5cc45b8b82f3b3baa0935e12e611f24ae8c
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

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Add Hostboot scratch registers to PEL

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I8f095b49ec204e6e33afc0ab300beeab5d3759a9

Enable guard support

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I7bc6c0cdd3aa6d513f1a87d351b99069fc005339

Add RAS data support for 'callout_self' and 'callout_unit'

With this change, 'callout_self' and 'callout_unit' actions will add a
callout with location code into the PEL.

Change

Add RAS data support for 'callout_self' and 'callout_unit'

With this change, 'callout_self' and 'callout_unit' actions will add a
callout with location code into the PEL.

Change-Id: I975f2059a71f7b529a40fae03273cc3c387c4cef
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

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Implemented HardwareCalloutResolution::resolve()

Change-Id: I19a0d1da6b172fd74fab8680c515391b883dac95
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

Config option to enable PHAL APIs

There are a couple required PHAL APIs that are not available upstream.
It is uncertain if these APIs will ever be available upstream.
Fortunately, t

Config option to enable PHAL APIs

There are a couple required PHAL APIs that are not available upstream.
It is uncertain if these APIs will ever be available upstream.
Fortunately, the APIs are only needed to provide information that is
displayed in a PEL. So there is a less accuate alternative when the APIs
are not available.

Change-Id: I1a4a1838520c18053ab31f561d05875d4a94c20e
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

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Get chip ID/EC from hardware if not synced in attributes

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I988fd16c1514d9fe2058f8becdfcf3a39abf8b85

fix query for hardware analysis enabled

The original enum queried is not available upstream yet.

Change-Id: I731394da0007523d1a56a8e01f2371651a1fc989
Signed-off-by: Zane Shelley

fix query for hardware analysis enabled

The original enum queried is not available upstream yet.

Change-Id: I731394da0007523d1a56a8e01f2371651a1fc989
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

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Avoid analyzing hardware on legacy processors

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I4c041b9f2b5448b46efc792c2d793ebf15ba7adc

pdbg util to get FSI target

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I9cd110fe43b1274c0e738c8b3e127c6c95760869

pdbg utils for finding all active chips

Change-Id: I444c1062d28c10ecd47426c60ffe0604cc5eaac5
Signed-off-by: Zane Shelley <zshelle@us.ibm.com>

util::pdbg functions for path, position, and target type

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: I4f4a5b1aa6ab13f60e61d77a866cfc24c7854677

Proper support for initializing the isolator

Signed-off-by: Zane Shelley <zshelle@us.ibm.com>
Change-Id: Id9a65dc6318420144a7ba9fb78d8a317f1181917