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44d62462 |
| 24-Jul-2016 |
Mark Brown <broonie@kernel.org> |
Merge remote-tracking branch 'asoc/topic/intel' into asoc-next
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Revision tags: v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4 |
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0d682104 |
| 08-Jul-2016 |
Dharageswari R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Fix to use the actual size for TLV control DSP expects the actual length of parameters that is set through TLV to be passed in large config set, so pass the actual
ASoC: Intel: Skylake: Fix to use the actual size for TLV control DSP expects the actual length of parameters that is set through TLV to be passed in large config set, so pass the actual size received in tlv_control_set() instead of max size. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.6.3, v4.4.14, v4.6.2, v4.4.13, openbmc-20160606-1 |
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f0aa94fa |
| 03-Jun-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Set the DSP pipe type DSP pipe type can be a pass through or it can be processing pipe. In case of pass through pipe, it is a single pipeline with both host and
ASoC: Intel: Skylake: Set the DSP pipe type DSP pipe type can be a pass through or it can be processing pipe. In case of pass through pipe, it is a single pipeline with both host and link copier in the same pipeline. Identify the DSP pipe type if it pass through or not. Pass through pipe is identified by checking if it has both host and link copier in the same pipeline. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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2004432f |
| 03-Jun-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Reset DSP pipe when host/link DMA is reset In case of XRUN recovery PCM prepare will be called. In this case Host/Link DMAs are reset and reconfigured, hence the co
ASoC: Intel: Skylake: Reset DSP pipe when host/link DMA is reset In case of XRUN recovery PCM prepare will be called. In this case Host/Link DMAs are reset and reconfigured, hence the corresponding FE/BE pipe needs to be reset in order to get to a clean state. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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0ce8428b |
| 02-May-2016 |
Mark Brown <broonie@kernel.org> |
Merge tag 'asoc-fix-v4.6-rc5' into asoc-intel ASoC: Fixes for v4.6 This is a fairly large collection of fixes but almost all driver specific ones, especially to the new Intel dr
Merge tag 'asoc-fix-v4.6-rc5' into asoc-intel ASoC: Fixes for v4.6 This is a fairly large collection of fixes but almost all driver specific ones, especially to the new Intel drivers which have had a lot of recent development. The one core fix is a change to the debugfs code to avoid crashes in some relatively unusual configurations.
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Revision tags: v4.6.1, v4.4.12, openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9 |
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09305da9 |
| 21-Apr-2016 |
Shreyas NC <shreyas.nc@intel.com> |
ASoC: Intel: Skylake: Use UUID in binary format To avoid complex string manipulations with UUID in canonical form, use UUID in binary format. Signed-off-by: Shreyas NC <shreyas.
ASoC: Intel: Skylake: Use UUID in binary format To avoid complex string manipulations with UUID in canonical form, use UUID in binary format. Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.4.8, v4.4.7, openbmc-20160329-2, openbmc-20160329-1 |
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d643678b |
| 28-Mar-2016 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix for unloading module only when it is loaded Module needs to be unloaded only when it is loaded successfully. To fix this, first correct the module state sequenc
ASoC: Intel: Skylake: Fix for unloading module only when it is loaded Module needs to be unloaded only when it is loaded successfully. To fix this, first correct the module state sequence and set module state to LOADED if module is loaded successfully. When unloading the module check if module state is not in UNINIT, then unload it. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1 |
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c115fa5e |
| 05-Feb-2016 |
Dharageswari.R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add MCLK configuration The SoC has MCLK output which is typically required by codecs. The MCLK is controlled by DSP FW, so driver can configure that by sending
ASoC: Intel: Skylake: Add MCLK configuration The SoC has MCLK output which is typically required by codecs. The MCLK is controlled by DSP FW, so driver can configure that by sending DMA_CONTROL IPC. The configuration for MCLK is present in the endpoint blob. So if block has this configuration, send IPC to DSP for MCLK configuration. This is done by new function skl_dsp_set_dma_control() which is invoked by BE prepare. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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718a42b5 |
| 05-Feb-2016 |
Dharageswari.R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add skl_tplg_be_get_cpr_module() helper An I2S port can be connected to multiple BE pipes, get module config only for the active BE pipe. This helpers help
ASoC: Intel: Skylake: Add skl_tplg_be_get_cpr_module() helper An I2S port can be connected to multiple BE pipes, get module config only for the active BE pipe. This helpers helps to do that and is used in subsequent patches Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1, v4.4, openbmc-20151217-1, openbmc-20151210-1 |
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7d9f2911 |
| 03-Dec-2015 |
Omair M Abdullah <omair.m.abdullah@intel.com> |
ASoC: Intel: Skylake: read params from DSP if module is on If a module is ON then we should read the module parameters from DSP rather than driver cached values Signed-off-by: O
ASoC: Intel: Skylake: read params from DSP if module is on If a module is ON then we should read the module parameters from DSP rather than driver cached values Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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4ced1827 |
| 03-Dec-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix module init data correctly Module initialization parameter data can be set by - INIT_INSTANCE IPC by using the default value - SET_PARAMS immediat
ASoC: Intel: Skylake: Fix module init data correctly Module initialization parameter data can be set by - INIT_INSTANCE IPC by using the default value - SET_PARAMS immediately after INIT_INSTANCE - SET_PARAMS data from kcontrol values set this patch add param type to identify the parameters has to be sent to DSP. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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fd18110f |
| 03-Dec-2015 |
Dharageswari R <dharageswari.r@intel.com> |
ASoC: Intel: Skylake: Add support for Mic Select module Mic select is a DSP module which is used to select one or many inputs to form an output. This is useful to select data selecti
ASoC: Intel: Skylake: Add support for Mic Select module Mic select is a DSP module which is used to select one or many inputs to form an output. This is useful to select data selectively from PDM input and hence the name. This module is of generic module type. This patch adds support to add and configure Mic select module in firmware topology. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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b18c458d |
| 03-Dec-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add memory pages to widget data. A module can require extra memory for processing, like audio algorithms. The memory for these modules needs to be represented i
ASoC: Intel: Skylake: Add memory pages to widget data. A module can require extra memory for processing, like audio algorithms. The memory for these modules needs to be represented in base module configuration and passed to DSP on init, so add the memory pages as a field in widget data Signed-off-by: Dharageswari.R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-20151202-1 |
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abb74003 |
| 28-Nov-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add support to configure module params This adds support to configure module parameter during module initialization or after module init using set module param
ASoC: Intel: Skylake: Add support to configure module params This adds support to configure module parameter during module initialization or after module init using set module param required by the DSP firmware sequence. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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399b210b |
| 28-Nov-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add helper routine to handle Algo parameter Some DSP modules has user configurable parameters, which are required by some modules at module initialization.
ASoC: Intel: Skylake: Add helper routine to handle Algo parameter Some DSP modules has user configurable parameters, which are required by some modules at module initialization. To configure the module algorithm parameter during initialization we add helpers here Signed-off-by: Divya Prakash <divya1.prakash@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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9939a9c3 |
| 28-Nov-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add helper routines to handle module params Some DSP modules have user configurable parameters. These parameters are required by modules in the following scenario
ASoC: Intel: Skylake: Add helper routines to handle module params Some DSP modules have user configurable parameters. These parameters are required by modules in the following scenario - during initialization - after initialization using set parameter This patch adds helper routine to set module parameters using large config set IPC message and removes params to be passed as init module routine. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1 |
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65aecfa8 |
| 26-Oct-2015 |
Hardik T Shah <hardik.t.shah@intel.com> |
ASoC: Intel: Skylake: Add support for module GUIDs The DSP FW specifies loadable modules using GUIDs so add support to specify the GUIDs from topology Signed-off-by: Hardik T Sh
ASoC: Intel: Skylake: Add support for module GUIDs The DSP FW specifies loadable modules using GUIDs so add support to specify the GUIDs from topology Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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04afbbbb |
| 26-Oct-2015 |
Hardik T Shah <hardik.t.shah@intel.com> |
ASoC: Intel: Skylake: Update the topology interface structure This patch updates the topology interface structure alignment and also updates the Sample interleaving defines Sign
ASoC: Intel: Skylake: Update the topology interface structure This patch updates the topology interface structure alignment and also updates the Sample interleaving defines Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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4cd9899f |
| 26-Oct-2015 |
Hardik T Shah <hardik.t.shah@intel.com> |
ASoC: Intel: Skylake: Add multiple pin formats The module pin formats are considered homogeneous, but some modules can have different pcm formats on different pins, like reference si
ASoC: Intel: Skylake: Add multiple pin formats The module pin formats are considered homogeneous, but some modules can have different pcm formats on different pins, like reference signal for a module. This patch add support for configuration of each pin of module and allows us to specify if pins and homogeneous or heterogeneous Signed-off-by: Hardik T Shah <hardik.t.shah@intel.com> Signed-off-by: Omair M Abdullah <omair.m.abdullah@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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ce1b5551 |
| 26-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: use module_pin info for unbind in_pin and out_pin list for a module has the information about the module that are bound together. So we can directly look at pin
ASoC: Intel: Skylake: use module_pin info for unbind in_pin and out_pin list for a module has the information about the module that are bound together. So we can directly look at pin information of module for binding and unbind. As a result the preinitialized dapm_path_last we had is removed and code and memory optimzed. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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4f745708 |
| 26-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Fix support for multiple pins in a module For supporting multiple dynamic pins, module state check is incorrect. In case of unbind, module state need to be changed
ASoC: Intel: Skylake: Fix support for multiple pins in a module For supporting multiple dynamic pins, module state check is incorrect. In case of unbind, module state need to be changed to uninit if all pins in the module is is unbind state. To handle module state correctly add pin state and use pin state check to set module state correctly. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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4e10996b |
| 22-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Add support to disable module notifications Each FW modules can report underrun/overrun notification from all modules. This patch disables underrun/overrun notifica
ASoC: Intel: Skylake: Add support to disable module notifications Each FW modules can report underrun/overrun notification from all modules. This patch disables underrun/overrun notification after firmware is loaded. This will be supportted for debug mode only thru debugfs Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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d7b18813 |
| 22-Oct-2015 |
Jeeja KP <jeeja.kp@intel.com> |
ASoC: Intel: Skylake: Update for ssp node index in copier cfg DSP firmware has interface change for SSP node index structure. New FW interface removes the dual_mono field and adds 4 bits
ASoC: Intel: Skylake: Update for ssp node index in copier cfg DSP firmware has interface change for SSP node index structure. New FW interface removes the dual_mono field and adds 4 bits for TDM slot group index. This patch updates the ssp dma to align with the DSP firmware structure. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
3af36706 |
| 07-Oct-2015 |
Vinod Koul <vinod.koul@intel.com> |
ASoC: Intel: Skylake: Add topology core init and handlers The SKL driver does not code DSP topology in driver. It uses the newly added ASoC topology core to parse the topology informatio
ASoC: Intel: Skylake: Add topology core init and handlers The SKL driver does not code DSP topology in driver. It uses the newly added ASoC topology core to parse the topology information (controls, widgets and map) from topology binary. Each topology element passed private data which contains information that driver used to identify the module instance within firmware and send IPCs for that module to DSP firmware along with parameters. This patch adds init routine to invoke topology load and callback for topology creation. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
cfb0a873 |
| 07-Oct-2015 |
Vinod Koul <vinod.koul@intel.com> |
ASoC: Intel: Skylake: Add FE and BE hw_params handling For FE and BE, the PCM parameters come from FE and BE hw_params values passed. For a FE we convert the FE params to DSP expected
ASoC: Intel: Skylake: Add FE and BE hw_params handling For FE and BE, the PCM parameters come from FE and BE hw_params values passed. For a FE we convert the FE params to DSP expected module format and pass to DSP. For a BE we need to find the gateway settings (i2s/PDM) to be applied. These are queried from NHLT table and applied. Further for BE based on direction the settings are applied as either source or destination parameters. These helpers here allow the format to be calculated and queried as per firmware format. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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