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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36 |
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| #
5d3b6ede |
| 21-Apr-2022 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Update the clock providers for PCIe host controller
Remove fixed clock and source common clock for PCIe host controller.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@t
arm64: dts: visconti: Update the clock providers for PCIe host controller
Remove fixed clock and source common clock for PCIe host controller.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-7-nobuhiro1.iwamatsu@toshiba.co.jp/
show more ...
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| #
c8a93f91 |
| 22-Apr-2022 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Update the clock providers for ethernet device
Remove fixed clock and source common clock for ethernet device.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.
arm64: dts: visconti: Update the clock providers for ethernet device
Remove fixed clock and source common clock for ethernet device.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-6-nobuhiro1.iwamatsu@toshiba.co.jp/
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| #
27b75490 |
| 21-Apr-2022 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Update the clock providers for watchdog timer
Remove fixed clock and source common clock for watchdog timer.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp
arm64: dts: visconti: Update the clock providers for watchdog timer
Remove fixed clock and source common clock for watchdog timer.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-4-nobuhiro1.iwamatsu@toshiba.co.jp/
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| #
43740556 |
| 21-Apr-2022 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Update the clock providers for UART
Remove fixed clock and source common clock for UART.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore
arm64: dts: visconti: Update the clock providers for UART
Remove fixed clock and source common clock for UART.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-2-nobuhiro1.iwamatsu@toshiba.co.jp/
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Revision tags: v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63 |
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| #
6beeaf48 |
| 06-Sep-2021 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoC
Add PCIe node and fixed clock for PCIe in TMPV7708's dtsi,
and tmpv7708-rm-mbrc boards's dts.
Signed-off-by: Nobuhiro Iwamats
arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoC
Add PCIe node and fixed clock for PCIe in TMPV7708's dtsi,
and tmpv7708-rm-mbrc boards's dts.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20210907042500.1525771-1-nobuhiro1.iwamatsu@toshiba.co.jp
show more ...
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Revision tags: v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43 |
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| #
172cdcae |
| 07-Jun-2021 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Add PWM support for TMPV7708 SoC
Add PWM node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's dts.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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Revision tags: v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17 |
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| #
ec8a42e7 |
| 15-Feb-2021 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm: dts: visconti: Add DT support for Toshiba Visconti5 ethernet controller
Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file.
And enable this node in TMPV7708 RM main boar
arm: dts: visconti: Add DT support for Toshiba Visconti5 ethernet controller
Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file.
And enable this node in TMPV7708 RM main board's board-specific DT file.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.11, v5.10.16, v5.10.15, v5.10.14 |
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| #
c988ae37 |
| 17-Dec-2020 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver
Add the GPIO node in Toshiba Visconti5 SoC-specific DT file.
And enable the GPIO node in TMPV7708 RM main board's board-specific
arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver
Add the GPIO node in Toshiba Visconti5 SoC-specific DT file.
And enable the GPIO node in TMPV7708 RM main board's board-specific DT file.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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| #
0109a175 |
| 17-Dec-2020 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver
Add the GPIO node in Toshiba Visconti5 SoC-specific DT file.
And enable the GPIO node in TMPV7708 RM main board's board-specific
arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver
Add the GPIO node in Toshiba Visconti5 SoC-specific DT file.
And enable the GPIO node in TMPV7708 RM main board's board-specific DT file.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
show more ...
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Revision tags: v5.10 |
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| #
4fd18fc3 |
| 01-Dec-2020 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Add watchdog support for TMPV7708 SoC
Add watchdog node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's
dts.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.
arm64: dts: visconti: Add watchdog support for TMPV7708 SoC
Add watchdog node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's
dts.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
show more ...
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36 |
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| #
48dea9a7 |
| 27-Apr-2020 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Add device tree for TMPV7708 RM main board
Add basic support for the Visconti TMPV7708 SoC peripherals -
- CPU
- CA53 x 4 and 2 cluster.
- not support PSCI, currently
arm64: dts: visconti: Add device tree for TMPV7708 RM main board
Add basic support for the Visconti TMPV7708 SoC peripherals -
- CPU
- CA53 x 4 and 2 cluster.
- not support PSCI, currently only spin-table is supported.
- Interrupt controller (ARM Generic Interrupt Controller)
- Timer (ARM architected timer)
- UART (ARM PL011 UART controller)
- SPI (ARM PL022 SPI controller)
- I2C (Synopsys DesignWare APB I2C Controller)
- Pin control (Visconti specific)
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
show more ...
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36 |
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| #
48dea9a7 |
| 27-Apr-2020 |
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> |
arm64: dts: visconti: Add device tree for TMPV7708 RM main board
Add basic support for the Visconti TMPV7708 SoC peripherals -
- CPU
- CA53 x 4 and 2 cluster.
- not sup
arm64: dts: visconti: Add device tree for TMPV7708 RM main board
Add basic support for the Visconti TMPV7708 SoC peripherals -
- CPU
- CA53 x 4 and 2 cluster.
- not support PSCI, currently only spin-table is supported.
- Interrupt controller (ARM Generic Interrupt Controller)
- Timer (ARM architected timer)
- UART (ARM PL011 UART controller)
- SPI (ARM PL022 SPI controller)
- I2C (Synopsys DesignWare APB I2C Controller)
- Pin control (Visconti specific)
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
show more ...
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