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060f35a3 |
| 12-Feb-2025 |
Andrew Jeffery <andrew@codeconstruct.com.au> |
Merge tag 'v6.6.76' into for/openbmc/dev-6.6
This is the 6.6.76 stable release
Conflicts: arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
Conflicts were resolved in favour of our side a
Merge tag 'v6.6.76' into for/openbmc/dev-6.6
This is the 6.6.76 stable release
Conflicts: arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
Conflicts were resolved in favour of our side as the upstream stable branches cherry-picked a small number of changes out of a much large series, which has already been backported.
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Revision tags: v6.6.77, v6.6.76, v6.6.75, v6.6.74, v6.6.73, v6.6.72, v6.6.71, v6.12.9, v6.6.70, v6.12.8, v6.6.69, v6.12.7, v6.6.68 |
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4ba4d5c1 |
| 24-Dec-2024 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sc7280: correct sleep clock frequency
[ Upstream commit f6ccdca14eac545320ab03d6ca91ca343e7372e5 ]
The SC7280 platform uses PMK8350 to provide sleep clock. According to the docume
arm64: dts: qcom: sc7280: correct sleep clock frequency
[ Upstream commit f6ccdca14eac545320ab03d6ca91ca343e7372e5 ]
The SC7280 platform uses PMK8350 to provide sleep clock. According to the documentation, that clock has 32.7645 kHz frequency. Correct the sleep clock definition.
Fixes: 7a1f4e7f740d ("arm64: dts: qcom: sc7280: Add basic dts/dtsi files for sc7280 soc") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20241224-fix-board-clocks-v3-8-e9b08fbeadd3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v6.12.6, v6.6.67, v6.12.5, v6.6.66, v6.6.65, v6.12.4, v6.6.64, v6.12.3, v6.12.2, v6.6.63, v6.12.1, v6.12, v6.6.62, v6.6.61, v6.6.60, v6.6.59, v6.6.58, v6.6.57, v6.6.56, v6.6.55, v6.6.54, v6.6.53, v6.6.52, v6.6.51, v6.6.50, v6.6.49, v6.6.48, v6.6.47, v6.6.46 |
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0db00e5d |
| 11-Aug-2024 |
Andrew Jeffery <andrew@codeconstruct.com.au> |
Merge tag 'v6.6.45' into for/openbmc/dev-6.6
This is the 6.6.45 stable release
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Revision tags: v6.6.45, v6.6.44, v6.6.43, v6.6.42, v6.6.41, v6.6.40, v6.6.39, v6.6.38, v6.6.37, v6.6.36, v6.6.35, v6.6.34, v6.6.33 |
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#
5bf33793 |
| 04-Jun-2024 |
Krishna Kurapati <quic_kriskura@quicinc.com> |
arm64: dts: qcom: sc7280: Disable SuperSpeed instances in park mode
[ Upstream commit 3d930f1750ce30a6c36dbc71f8ff7e20322b94d7 ]
On SC7280, in host mode, it is observed that stressing out controlle
arm64: dts: qcom: sc7280: Disable SuperSpeed instances in park mode
[ Upstream commit 3d930f1750ce30a6c36dbc71f8ff7e20322b94d7 ]
On SC7280, in host mode, it is observed that stressing out controller results in HC died error:
xhci-hcd.12.auto: xHCI host not responding to stop endpoint command xhci-hcd.12.auto: xHCI host controller not responding, assume dead xhci-hcd.12.auto: HC died; cleaning up
And at this instant only restarting the host mode fixes it. Disable SuperSpeed instances in park mode for SC7280 to mitigate this issue.
Reported-by: Doug Anderson <dianders@google.com> Cc: stable@vger.kernel.org Fixes: bb9efa59c665 ("arm64: dts: qcom: sc7280: Add USB related nodes") Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240604060659.1449278-3-quic_kriskura@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
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#
f879a830 |
| 11-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sc7280: switch USB+DP QMP PHY to new style of bindings
[ Upstream commit 36888ed83f998c3335272f9e353eaf6d109e2429 ]
Change the USB QMP PHY to use newer style of QMP PHY bindings (
arm64: dts: qcom: sc7280: switch USB+DP QMP PHY to new style of bindings
[ Upstream commit 36888ed83f998c3335272f9e353eaf6d109e2429 ]
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-8-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Stable-dep-of: 3d930f1750ce ("arm64: dts: qcom: sc7280: Disable SuperSpeed instances in park mode") Signed-off-by: Sasha Levin <sashal@kernel.org>
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46eeaa11 |
| 03-Apr-2024 |
Andrew Jeffery <andrew@codeconstruct.com.au> |
Merge tag 'v6.6.24' into dev-6.6
This is the 6.6.24 stable release
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779af170 |
| 18-Dec-2023 |
Krishna chaitanya chundru <quic_krichai@quicinc.com> |
arm64: dts: qcom: sc7280: Add additional MSI interrupts
[ Upstream commit b8ba66b40da3230a8675cb5dd5c2dea5bce24d62 ]
Current MSI's mapping doesn't have all the vectors. This platform supports 8 vec
arm64: dts: qcom: sc7280: Add additional MSI interrupts
[ Upstream commit b8ba66b40da3230a8675cb5dd5c2dea5bce24d62 ]
Current MSI's mapping doesn't have all the vectors. This platform supports 8 vectors each vector supports 32 MSI's, so total MSI's supported is 256.
Add all the MSI groups supported for this PCIe instance in this platform.
Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") cc: stable@vger.kernel.org Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> Link: https://lore.kernel.org/r/20231218-additional_msi-v1-1-de6917392684@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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7d7ae873 |
| 10-Feb-2024 |
Andrew Jeffery <andrew@codeconstruct.com.au> |
Merge tag 'v6.6.15' into dev-6.6
This is the 6.6.15 stable release
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1188f7f1 |
| 10-Feb-2024 |
Andrew Jeffery <andrew@codeconstruct.com.au> |
Merge tag 'v6.6.14' into dev-6.6
This is the 6.6.14 stable release
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02f867d2 |
| 20-Nov-2023 |
Johan Hovold <johan+linaro@kernel.org> |
arm64: dts: qcom: sc7280: fix usb_1 wakeup interrupt types
commit c34199d967a946e55381404fa949382691737521 upstream.
A recent cleanup reordering the usb_1 wakeup interrupts inadvertently switched t
arm64: dts: qcom: sc7280: fix usb_1 wakeup interrupt types
commit c34199d967a946e55381404fa949382691737521 upstream.
A recent cleanup reordering the usb_1 wakeup interrupts inadvertently switched the DP and SuperSpeed interrupt trigger types.
Fixes: 4a7ffc10d195 ("arm64: dts: qcom: align DWC3 USB interrupts with DT schema") Cc: stable@vger.kernel.org # 5.19 Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231120164331.8116-5-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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afea6ffb |
| 18-Dec-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
arm64: dts: qcom: sc7280: Mark SDHCI hosts as cache-coherent
[ Upstream commit 827f5fc8d912203c1f971e47d61130b13c6820ba ]
The SDHCI hosts on SC7280 are cache-coherent, just like on most fairly rece
arm64: dts: qcom: sc7280: Mark SDHCI hosts as cache-coherent
[ Upstream commit 827f5fc8d912203c1f971e47d61130b13c6820ba ]
The SDHCI hosts on SC7280 are cache-coherent, just like on most fairly recent Qualcomm SoCs. Mark them as such.
Fixes: 298c81a7d44f ("arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231218-topic-7280_dmac_sdhci-v1-1-97af7efd64a1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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d7206c3b |
| 20-Nov-2023 |
Johan Hovold <johan+linaro@kernel.org> |
arm64: dts: qcom: sc7280: fix usb_2 wakeup interrupt types
[ Upstream commit 24f8aba9a7c77c7e9d814a5754798e8346c7dd28 ]
The DP/DM wakeup interrupts are edge triggered and which edge to trigger on d
arm64: dts: qcom: sc7280: fix usb_2 wakeup interrupt types
[ Upstream commit 24f8aba9a7c77c7e9d814a5754798e8346c7dd28 ]
The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected.
Note that only triggering on rising edges can be used to detect resume events but not disconnect events.
Fixes: bb9efa59c665 ("arm64: dts: qcom: sc7280: Add USB related nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20231120164331.8116-6-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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20455e11 |
| 20-Nov-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
arm64: dts: qcom: sc7280: Mark Adreno SMMU as DMA coherent
[ Upstream commit 31edad478534186a2718be9206ce7b19f2735f6e ]
The SMMUs on sc7280 are cache-coherent. APPS_SMMU is marked as such, mark the
arm64: dts: qcom: sc7280: Mark Adreno SMMU as DMA coherent
[ Upstream commit 31edad478534186a2718be9206ce7b19f2735f6e ]
The SMMUs on sc7280 are cache-coherent. APPS_SMMU is marked as such, mark the GPU one as well.
Fixes: 96c471970b7b ("arm64: dts: qcom: sc7280: Add gpu support") Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230926-topic-a643-v2-3-06fa3d899c0a@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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028a2655 |
| 20-Nov-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
arm64: dts: qcom: sc7280: Fix up GPU SIDs
[ Upstream commit 94085049fdad7a36fe14dd55e72e712fe55d6bca ]
GPU_SMMU SID 1 is meant for Adreno LPAC (Low Priority Async Compute). On platforms that suppor
arm64: dts: qcom: sc7280: Fix up GPU SIDs
[ Upstream commit 94085049fdad7a36fe14dd55e72e712fe55d6bca ]
GPU_SMMU SID 1 is meant for Adreno LPAC (Low Priority Async Compute). On platforms that support it (in firmware), it is necessary to describe that link, or Adreno register access will hang the board.
The current settings are functionally identical, *but* due to what is likely hardcoded security policies, the secure firmware rejects them, resulting in the board hanging. To avoid that, alter the settings such that SID 0 and 1 are described separately.
Fixes: 96c471970b7b ("arm64: dts: qcom: sc7280: Add gpu support") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230926-topic-a643-v2-2-06fa3d899c0a@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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940ce0fe |
| 06-Nov-2023 |
Douglas Anderson <dianders@chromium.org> |
arm64: dts: qcom: sc7280: Make watchdog bark interrupt edge triggered
[ Upstream commit 6897fac411db7b43243f67d4fd4d3f95abf7f656 ]
As described in the patch ("arm64: dts: qcom: sc7180: Make watchdo
arm64: dts: qcom: sc7280: Make watchdog bark interrupt edge triggered
[ Upstream commit 6897fac411db7b43243f67d4fd4d3f95abf7f656 ]
As described in the patch ("arm64: dts: qcom: sc7180: Make watchdog bark interrupt edge triggered"), the Qualcomm watchdog timer's bark interrupt should be configured as edge triggered. Make the change.
Fixes: 0e51f883daa9 ("arm64: dts: qcom: sc7280: Add APSS watchdog node") Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231106144335.v2.2.I11f77956d2492c88aca0ef5462123f225caf4fb4@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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6252b33a |
| 19-Sep-2023 |
Luca Weiss <luca.weiss@fairphone.com> |
arm64: dts: qcom: sc7280: Mark some nodes as 'reserved'
[ Upstream commit 6da24ba932082bae110feb917a64bb54637fa7c0 ]
With the standard Qualcomm TrustZone setup, components such as lpasscc, pdc_rese
arm64: dts: qcom: sc7280: Mark some nodes as 'reserved'
[ Upstream commit 6da24ba932082bae110feb917a64bb54637fa7c0 ]
With the standard Qualcomm TrustZone setup, components such as lpasscc, pdc_reset and watchdog shouldn't be touched by Linux. Mark them with the status 'reserved' and reenable them in the chrome-common dtsi.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20230919-fp5-initial-v2-1-14bb7cedadf5@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> Stable-dep-of: 6897fac411db ("arm64: dts: qcom: sc7280: Make watchdog bark interrupt edge triggered") Signed-off-by: Sasha Levin <sashal@kernel.org>
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b97d6790 |
| 13-Dec-2023 |
Joel Stanley <joel@jms.id.au> |
Merge tag 'v6.6.6' into dev-6.6
This is the 6.6.6 stable release
Signed-off-by: Joel Stanley <joel@jms.id.au>
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55196e9d |
| 20-Aug-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: qcom: sc7280: drop incorrect EUD port on SoC side
[ Upstream commit 39c8af78cbefb8c71a5ad1fa088e761ef418f0a0 ]
Qualcomm Embedded USB Debugger (EUD) second port should point to Type-C US
arm64: dts: qcom: sc7280: drop incorrect EUD port on SoC side
[ Upstream commit 39c8af78cbefb8c71a5ad1fa088e761ef418f0a0 ]
Qualcomm Embedded USB Debugger (EUD) second port should point to Type-C USB connector. Such connector was defined directly in root node of sc7280.dtsi which is clearly wrong. SC7280 is a chip, so physically it does not have USB Type-C port. The connector is usually accessible through some USB switch or controller.
Doug Anderson said that he wasn't ever able to use EUD on Herobrine boards, probably because of invalid or missing DTS description - DTS is saying EUD is on usb_2 node, which is connected to a USB Hub, not to the Type-C port.
Correct the EUD/USB connector topology by removing the top-level fake USB connector and EUD port pointing to it, and disabling the incomplete EUD device node.
This fixes also dtbs_check warnings:
sc7280-herobrine-crd.dtb: connector: ports:port@0: 'reg' is a required property
Link: https://lore.kernel.org/all/CAD=FV=Xt26=rBf99mzkAuwwtb2f-jnKtnHaEhXnthz0a5zke4Q@mail.gmail.com/ Fixes: 9ee402ccfeb1 ("arm64: dts: qcom: sc7280: Fix EUD dt node syntax") Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> Cc: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230820075626.22600-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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c81eb58f |
| 11-Aug-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
arm64: dts: qcom: sc7280: Add missing LMH interrupts
[ Upstream commit 3f93d119c9d6e1744d55cd48af764160a1a3aca3 ]
Hook up the interrupts that signal the Limits Management Hardware has started some
arm64: dts: qcom: sc7280: Add missing LMH interrupts
[ Upstream commit 3f93d119c9d6e1744d55cd48af764160a1a3aca3 ]
Hook up the interrupts that signal the Limits Management Hardware has started some sort of throttling action.
Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-7280_lmhirq-v1-1-c262b6a25c8f@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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7d3fc1eb |
| 11-Jul-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
arm64: dts: qcom: sc7280: link usb3_phy_wrapper_gcc_usb30_pipe_clk
[ Upstream commit 70c4a1ca13b333b00e01266d299605fa1041b0d5 ]
Use usb_1_ssphy's clock as gcc's usb3_phy_wrapper_gcc_usb30_pipe_clk
arm64: dts: qcom: sc7280: link usb3_phy_wrapper_gcc_usb30_pipe_clk
[ Upstream commit 70c4a1ca13b333b00e01266d299605fa1041b0d5 ]
Use usb_1_ssphy's clock as gcc's usb3_phy_wrapper_gcc_usb30_pipe_clk clock source.
Suggested-by: Neil Armstrong <neil.armstrong@linaro.org> Fixes: 1c39e6f9b534 ("arm64: dts: qcom: sc7280: Add USB related nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-7-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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c900529f |
| 12-Sep-2023 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-fixes into drm-misc-fixes
Forwarding to v6.6-rc1.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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0e72db77 |
| 30-Aug-2023 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann: "These are the devicetree updates for Arm and RISC-V based SoCs, main
Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann: "These are the devicetree updates for Arm and RISC-V based SoCs, mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and Starfive.
Only a few new SoC got added:
- TI AM62P5, a variant of the existing Sitara AM62x family
- Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55 SoC.
- Qualcomm ipq5018 is used in wireless access points
- Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone platform.
In total, 29 machines get added, which is low because of the summer break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST, Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of these are development and reference boards.
Despite not adding a lot of new machines, there are over 700 patches in total, most of which are cleanups and minor fixes"
* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits) arm64: dts: use capital "OR" for multiple licenses in SPDX ARM: dts: use capital "OR" for multiple licenses in SPDX arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved ARM: dts: qcom: apq8064: add support to gsbi4 uart riscv: dts: change TH1520 files to dual license riscv: dts: thead: add BeagleV Ahead board device tree dt-bindings: riscv: Add BeagleV Ahead board compatibles ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs ARM: dts: stm32: support display on stm32f746-disco board ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco ARM: dts: stm32: add pin map for LTDC on stm32f7 ARM: dts: stm32: add ltdc support on stm32f746 MCU arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC riscv: dts: starfive: fix jh7110 qspi sort order ...
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1ac731c5 |
| 30-Aug-2023 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge branch 'next' into for-linus
Prepare input updates for 6.6 merge window.
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6522fbd4 |
| 21-Aug-2023 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DeviceTree updates for v6.6
Initial support for the SM4450 platform and the Q
Merge tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DeviceTree updates for v6.6
Initial support for the SM4450 platform and the QRD device thereon is added.
The IPQ5018 platform is introduced, and the RDP432-C2 board thereon.
A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based LEDs and buttons.
On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added.
On MSM8916, the D3 camera mezzanine is improved and refactored out to its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with charger, while Samsung Galaxy J5 and E5 gains touchscreen support.
A few fixes for MSM8939 are introduced, and initial support for Samsung Galaxy A7 is add.
Support for scaling the cache bus fabric is introduced on MSM8996. A missing interrupt for the USB2 controller is added. The touchscreen vio supply on Xiaomi Mi 5 is corrected, and a few other cleanups are introduces across other devices.
The display controller is introduced for MSM8998, a few clock fixes are introduced and missing power domains are added for the multimedia subsystem iommu.
Reserved memory-regions and reserved GPIO lists are updated for the QDU/QRU1000 IDPs.
USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is enabled for the RB2.
PCIe and Ethernet support is introduced on SA8775P, and enabled for the Ride board.
On SC7180 the PSCI integration is refactored, to allow supporting devices with the Qualcomm firmware. BWMON is introduced, alongside the CPUfreq-based bus voting.
A number of fixes are added for SC8180X, on the Primus and Lenovo Flex 5G devices pmic_glink is introduced and wired up, to provide support for external display.
Missing SCM interconnect is added to SC8280XP, and the PDC is marked as wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is corrected and a few regulators are renamed to align with schematics. The Lenovo Thinkpad X13s gains camera activity LED and a set of previously reserved GPIOs are released. The SA8540P Ride platform gains RTC support.
For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced and wired up as wakeup-parent of the TLMM.
On SDM845 the UFS controller gains interconnect path description, power-domain information is added to GCC and minimum frequency of the UFS ICE is corrected. On RB3 continuous splash memory region is described, and the camera subsystem is enabled. On the Lenovo Yoga C630 a missing power supply for the display panel is added, and the debug UART is introduced.
SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75 PMIC is described and added to the IDP.
GPU description is added to SM6115, and together with display enabled on the Lenovo Tab P11.
On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU is added, and the PDC is registered as wakeup-parent of TLMM.
L3 cache scaling is introduced on SM6375.
The DSI PHY compatible and an interrupt for I2C7 are corrected for SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected.
On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node gains interconnect paths, SMMU is marked as DMA coherent and dynamic power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line names are updated.
On SM8350 missing cluster sleep states and LMH interrupts are added, the CPU compatibles are corrected and APR and LPASS pinctrl support is introduced. The HDK gains uSD card support and PMK8350 is added.
For SM8450 support for RNG and RPMh stats are added, the ICE handling is extracted from the UFS node and the display subsystem gains a missing interconnect path. Thermal description is improved for the HDK.
On SM8550 MTP and QRD the pmic_glink is introduced, to provide DisplayPort output. A missing regulator supply is also added.
A few platforms that happens to share the RPMH power-domain resource identifier constants are migrated to new generic defines. ADC channel names are generalized on various PMICs.
A variety of devices gain chassis-type, and the GIC_SPI constant is replacing the 0 across a few different platforms.
* tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (215 commits) arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC arm64: dts: qcom: msm8916-samsung-e5: Add touchscreen arm64: dts: qcom: sc7180: Split up TF-A related PSCI configuration arm64: dts: qcom: sc8280xp-x13s: Add camera activity LED arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pins arm64: dts: qcom: msm8998: Add DPU1 nodes arm64: dts: qcom: msm8996: Fix dsi1 interrupts arm64: dts: qcom: sdx75-idp: Add regulator nodes arm64: dts: qcom: sdx75: Add rpmhpd node arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75 arm64: dts: qcom: Add pmx75 PMIC dtsi arm64: dts: qcom: Add pm7550ba PMIC dtsi arm64: dts: qcom: Add pinctrl gpio support for pm7250b arm64: dts: qcom: sdx75: Add spmi node arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMU ...
Link: https://lore.kernel.org/r/20230819034551.2537866-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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2612e3bb |
| 07-Aug-2023 |
Rodrigo Vivi <rodrigo.vivi@intel.com> |
Merge drm/drm-next into drm-intel-next
Catching-up with drm-next and drm-intel-gt-next. It will unblock a code refactor around the platform definitions (names vs acronyms).
Signed-off-by: Rodrigo V
Merge drm/drm-next into drm-intel-next
Catching-up with drm-next and drm-intel-gt-next. It will unblock a code refactor around the platform definitions (names vs acronyms).
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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