|
Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
|
| #
6b53039e |
| 17-Jul-2023 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove dmas and dma-names for debug UART
The debug UART doesn't support DMA and the DT bindings prohibit the use
of the dmas and dma-names properties for it, so remove them.
Signed-of
arm64: tegra: Remove dmas and dma-names for debug UART
The debug UART doesn't support DMA and the DT bindings prohibit the use
of the dmas and dma-names properties for it, so remove them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
|
Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80 |
|
| #
79ed18d9 |
| 22-Nov-2022 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions
arm64: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
|
Revision tags: v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48 |
|
| #
012877d0 |
| 15-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: tegra: Align gpio-keys node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzy
arm64: tegra: Align gpio-keys node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
|
Revision tags: v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36 |
|
| #
2f477ee3 |
| 25-Apr-2022 |
Arnd Bergmann <arnd@arndb.de> |
Revert "arm64: dts: tegra: Fix boolean properties with values"
This reverts commit 1a67653de0dd, which caused a boot regression.
The behavior of the "drive-push-pull" in the kernel does not
match w
Revert "arm64: dts: tegra: Fix boolean properties with values"
This reverts commit 1a67653de0dd, which caused a boot regression.
The behavior of the "drive-push-pull" in the kernel does not
match what the binding document describes. Revert Rob's patch
to make the DT match the kernel again, rather than the binding.
Link: https://lore.kernel.org/lkml/YlVAy95eF%2F9b1nmu@orome/
Reported-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
show more ...
|
|
Revision tags: v5.15.35, v5.15.34, v5.15.33 |
|
| #
1a67653d |
| 06-Apr-2022 |
Rob Herring <robh@kernel.org> |
arm64: dts: tegra: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value do
arm64: dts: tegra: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.
It may have been intended that 0 values are false, but there is no change
in behavior with this patch.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/Yk3nShkFzNJaI3/Z@robh.at.kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
show more ...
|
|
Revision tags: v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7 |
|
| #
635fb5d4 |
| 07-Dec-2021 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Rename GPIO hog nodes to match schema
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to
the DT schema. Rename all such nodes to allow validation to pass.
Signed-o
arm64: tegra: Rename GPIO hog nodes to match schema
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to
the DT schema. Rename all such nodes to allow validation to pass.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
097e01c6 |
| 06-Dec-2021 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Rename top-level regulators
Regulators defined at the top level in device tree are no longer part of
a simple bus and therefore don't have a reg property. Nodes without a
reg property
arm64: tegra: Rename top-level regulators
Regulators defined at the top level in device tree are no longer part of
a simple bus and therefore don't have a reg property. Nodes without a
reg property shouldn't have a unit-address either, so drop the unit
address from the node names. To ensure nodes aren't duplicated (in which
case they would end up merged in the final DTB), append the name of the
regulator to the node name.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
4cc3e3e1 |
| 06-Dec-2021 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Rename top-level clocks
Clocks defined at the top level in device tree are no longer part of a
simple bus and therefore don't have a reg property. Nodes without a reg
property shouldn'
arm64: tegra: Rename top-level clocks
Clocks defined at the top level in device tree are no longer part of a
simple bus and therefore don't have a reg property. Nodes without a reg
property shouldn't have a unit-address either, so drop the unit address
from the node names. To ensure nodes aren't duplicated (in which case
they would end up merged in the final DTB), append the name of the clock
to the node name.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
|
Revision tags: v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47 |
|
| #
bb678298 |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Various fixes for PMICs
Standardize on "pmic" as the node name for the PMIC on Tegra210 systems
and use consistent names for pinmux and GPIO hog nodes.
Signed-off-by: Thierry Reding <
arm64: tegra: Various fixes for PMICs
Standardize on "pmic" as the node name for the PMIC on Tegra210 systems
and use consistent names for pinmux and GPIO hog nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
644c569d |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Use proper tuple notation
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling
arm64: tegra: Use proper tuple notation
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling to properly parse this data.
While at it, also remove the "immovable" bit from PCI addresses. All of
these addresses are in fact "movable".
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
7517248a |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove simple regulators bus
The standard way to do this is to list out the regulators at the top-
level. Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <tred
arm64: tegra: Remove simple regulators bus
The standard way to do this is to list out the regulators at the top-
level. Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
393a403e |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove simple clocks bus
The standard way to do this is to list out the clocks at the top-level.
Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding@nvidi
arm64: tegra: Remove simple clocks bus
The standard way to do this is to list out the clocks at the top-level.
Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
67bb17f6 |
| 11-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Rename sdhci nodes to mmc
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.
Signed-off-by: Thierry Reding <tre
arm64: tegra: Rename sdhci nodes to mmc
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
772a6a7b |
| 11-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add unit-address to memory node
The memory node requires a unit-address. For some boards the bootloader,
which is usually locked down, uses a hard-coded name for the memory node
withou
arm64: tegra: Add unit-address to memory node
The memory node requires a unit-address. For some boards the bootloader,
which is usually locked down, uses a hard-coded name for the memory node
without a unit-address, so we can't fix it on those boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
|
Revision tags: v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25 |
|
| #
3056c1ca |
| 21-Feb-2019 |
Joseph Lo <josephl@nvidia.com> |
arm64: tegra: Enable CPU idle support for Shield
Enable CPU idle support for Shield platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Revision tags: v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15 |
|
| #
51e5e018 |
| 10-Jan-2019 |
Mark Zhang <markz@nvidia.com> |
arm64: tegra: Add regulators for Tegra210 Darcy
Add regulators to the Tegra210 Darcy DTS file including support for
the MAX77620 PMIC.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Th
arm64: tegra: Add regulators for Tegra210 Darcy
Add regulators to the Tegra210 Darcy DTS file including support for
the MAX77620 PMIC.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
6ec2c716 |
| 10-Jan-2019 |
Mark Zhang <markz@nvidia.com> |
arm64: tegra: Add pinmux for Darcy board
Add pinmux node for Tegra210 Darcy board.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| #
7152879d |
| 10-Jan-2019 |
Mark Zhang <markz@nvidia.com> |
arm64: tegra: Add gpio-keys nodes for Darcy
Add gpio-keys nodes for the power button.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| #
dd03aeef |
| 10-Jan-2019 |
Mark Zhang <markz@nvidia.com> |
arm64: tegra: Add support for NVIDIA Shield TV
Add initial device-tree support for NVIDIA Shield TV (a.k.a. Darcy)
based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.
Signed-off-by: Mark Zhang <markz
arm64: tegra: Add support for NVIDIA Shield TV
Add initial device-tree support for NVIDIA Shield TV (a.k.a. Darcy)
based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
|
Revision tags: v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47 |
|
| #
bb678298 |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Various fixes for PMICs
Standardize on "pmic" as the node name for the PMIC on Tegra210 systems
and use consistent names for pinmux and GPIO hog nodes.
Signed-off-
arm64: tegra: Various fixes for PMICs
Standardize on "pmic" as the node name for the PMIC on Tegra210 systems
and use consistent names for pinmux and GPIO hog nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
644c569d |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Use proper tuple notation
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
va
arm64: tegra: Use proper tuple notation
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling to properly parse this data.
While at it, also remove the "immovable" bit from PCI addresses. All of
these addresses are in fact "movable".
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
7517248a |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove simple regulators bus
The standard way to do this is to list out the regulators at the top-
level. Adopt the standard way to fix validation.
Signed-off-by:
arm64: tegra: Remove simple regulators bus
The standard way to do this is to list out the regulators at the top-
level. Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|
| #
393a403e |
| 12-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Remove simple clocks bus
The standard way to do this is to list out the clocks at the top-level.
Adopt the standard way to fix validation.
Signed-off-by: Thierry R
arm64: tegra: Remove simple clocks bus
The standard way to do this is to list out the clocks at the top-level.
Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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|
| #
67bb17f6 |
| 11-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Rename sdhci nodes to mmc
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.
Signed-off-by:
arm64: tegra: Rename sdhci nodes to mmc
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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|
| #
772a6a7b |
| 11-Jun-2020 |
Thierry Reding <treding@nvidia.com> |
arm64: tegra: Add unit-address to memory node
The memory node requires a unit-address. For some boards the bootloader,
which is usually locked down, uses a hard-coded name for the memory
arm64: tegra: Add unit-address to memory node
The memory node requires a unit-address. For some boards the bootloader,
which is usually locked down, uses a hard-coded name for the memory node
without a unit-address, so we can't fix it on those boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
show more ...
|