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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4 |
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774acd59 |
| 23-Jun-2023 |
Dinh Nguyen <dinguyen@kernel.org> |
arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions
flash@0: partitions: Unevaluated properties are not allowed
('partition@3FE0000' was unexpected)
Signed-off-by: Dinh Nguyen
arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions
flash@0: partitions: Unevaluated properties are not allowed
('partition@3FE0000' was unexpected)
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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| #
b2c62c39 |
| 25-Jun-2023 |
Dinh Nguyen <dinguyen@kernel.org> |
arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node
Although, we expect the bootloader to full memory details but passing empty
values can give warning, so add a default value.
arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node
Although, we expect the bootloader to full memory details but passing empty
values can give warning, so add a default value.
memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]}
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Revision tags: v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69 |
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| #
31354121 |
| 15-Sep-2022 |
Dinh Nguyen <dinguyen@kernel.org> |
arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the
arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Revision tags: v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30 |
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| #
bcea9aaa |
| 18-Mar-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
arm64: dts: n5x: drop invalid property and fix edac node name
The intel,sysmgr-syscon in EDAC/memory controller node is not a
recognized and documented property, so drop it to fix error:
sdr_edac
arm64: dts: n5x: drop invalid property and fix edac node name
The intel,sysmgr-syscon in EDAC/memory controller node is not a
recognized and documented property, so drop it to fix error:
sdr_edac@f87f8000: 'intel,sysmgr-syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Align also the node name with Devicetree specification (generic, not
specific, and EDAC is purely Linux term).
Fixes: ef82c9be844f ("arm64: dts: n5x: add sdr edac support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220318121044.108750-1-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.15.29, v5.15.28, v5.15.27, v5.15.26 |
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| #
ef82c9be |
| 24-Feb-2022 |
Dinh Nguyen <dinguyen@kernel.org> |
arm64: dts: n5x: add sdr edac support
The N5X platform has the Synopsys DDR controller the includes an EDAC
controller. Add the entry for the controller in the DTS file instead of
the base Agilex DT
arm64: dts: n5x: add sdr edac support
The N5X platform has the Synopsys DDR controller the includes an EDAC
controller. Add the entry for the controller in the DTS file instead of
the base Agilex DTSI because the base Agilex does not have the
controller.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Revision tags: v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16 |
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| #
fae3aa6c |
| 27-Dec-2021 |
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
arm64: dts: agilex: add board compatible for N5X DK
The Intel SoCFPGA N5X SoC Development Kit is a board with
Agilex, so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.k
arm64: dts: agilex: add board compatible for N5X DK
The Intel SoCFPGA N5X SoC Development Kit is a board with
Agilex, so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Revision tags: v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6 |
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| #
f4c35356 |
| 30-Nov-2021 |
Dinh Nguyen <dinguyen@kernel.org> |
arm64: dts: n5x: add qspi, usb, and ethernet support
Populate the N5X board dts file with support for QSPI, USB, and
ethernet.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Revision tags: v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22 |
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| #
15e26f69 |
| 08-Mar-2021 |
Krzysztof Kozlowski <krzk@kernel.org> |
arm64: dts: intel: socfpga: override clocks by label
Using full paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
exten
arm64: dts: intel: socfpga: override clocks by label
Using full paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Revision tags: v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10 |
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| #
a427485a |
| 07-Dec-2020 |
Dinh Nguyen <dinguyen@kernel.org> |
arm64: dts: n5x: Add support for Intel's eASIC N5X platform
The Intel eASIC N5X platform shares the same register map as the Agilex
platform, thus, we can re-use the socfpga_agilex.dtsi as the base
arm64: dts: n5x: Add support for Intel's eASIC N5X platform
The Intel eASIC N5X platform shares the same register map as the Agilex
platform, thus, we can re-use the socfpga_agilex.dtsi as the base
DTSI.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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