Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47 |
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#
4956be99 |
| 09-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: amlogic: correct gpio-keys properties
gpio-keys children do not use unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Martin Blumenstingl
arm64: dts: amlogic: correct gpio-keys properties
gpio-keys children do not use unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220609113911.380368-6-krzysztof.kozlowski@linaro.org
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Revision tags: v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10 |
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#
c183c406 |
| 07-Dec-2020 |
Stefan Agner <stefan@agner.ch> |
arm64: dts: meson: fix PHY deassert timing requirements
According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY regis
arm64: dts: meson: fix PHY deassert timing requirements
According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY registers. This fixes an issue seen on ODROID-C2 where the Ethernet link doesn't come up when using ip link set down/up: [ 6630.714855] meson8b-dwmac c9410000.ethernet eth0: Link is Down [ 6630.785775] meson8b-dwmac c9410000.ethernet eth0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=36) [ 6630.893071] meson8b-dwmac c9410000.ethernet: Failed to reset the dma [ 6630.893800] meson8b-dwmac c9410000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 6630.902835] meson8b-dwmac c9410000.ethernet eth0: stmmac_open: Hw setup failed
Fixes: f29cabf240ed ("arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/4a322c198b86e4c8b3dda015560a683babea4d63.1607363522.git.stefan@agner.ch
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#
46b7f224 |
| 07-Dec-2020 |
Stefan Agner <stefan@agner.ch> |
arm64: dts: meson: fix PHY deassert timing requirements
[ Upstream commit c183c406c4321002fe85b345b51bc1a3a04b6d33 ]
According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for i
arm64: dts: meson: fix PHY deassert timing requirements
[ Upstream commit c183c406c4321002fe85b345b51bc1a3a04b6d33 ]
According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY registers. This fixes an issue seen on ODROID-C2 where the Ethernet link doesn't come up when using ip link set down/up: [ 6630.714855] meson8b-dwmac c9410000.ethernet eth0: Link is Down [ 6630.785775] meson8b-dwmac c9410000.ethernet eth0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=36) [ 6630.893071] meson8b-dwmac c9410000.ethernet: Failed to reset the dma [ 6630.893800] meson8b-dwmac c9410000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 6630.902835] meson8b-dwmac c9410000.ethernet eth0: stmmac_open: Hw setup failed
Fixes: f29cabf240ed ("arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/4a322c198b86e4c8b3dda015560a683babea4d63.1607363522.git.stefan@agner.ch Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11 |
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#
f29cabf2 |
| 15-Jun-2019 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings
The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings.
Replace snps,reset-gpio from
arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings
The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings.
Replace snps,reset-gpio from the ðmac node with reset-gpios in the ethernet-phy node. The old snps,reset-active-low property is now encoded directly as GPIO flag inside the reset-gpios property.
snps,reset-delays-us is converted to reset-assert-us and reset-deassert-us. reset-assert-us is the second cell from snps,reset-delays-us while reset-deassert-us was the third cell.
Instead of blindly copying the old values (which seems strange since they gave the PHY one second to come out of reset) over this also updates the delays based on the datasheets: - the Realtek RTL8211F PHY needs a 10ms assert delay (the datasheet mentions: "For a complete PHY reset, this pin must be asserted low for at least 10ms") and a 30ms deassert delay (the datasheet mentions: "Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register". This applies to the following boards: GXBB NanoPi K2, GXBB Odroid-C2, GXBB Vega S95 variants, GXBB Wetek variants, GXL P230, GXM Khadas VIM2, GXM Nexbox A1, GXM Q200, GXM RBox Pro boards. - the ICPlus IP101GR PHY needs a 10ms assert delay (the datasheet mentions: "Trst | Reset period | 10ms") and a deassert delay of 10ms as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock output ready after reset released | 10ms"). This applies to the GXBB Nexbox A95X board. - the Micrel KSZ9031 seems to require a 100us delay but use the same (seemingly safe) values from RTL8211F due to lack of a board to verify this. This applies to the GXBB P200 board.
The GXBB P201 board is left out from this conversion because it doesn't have a dedicated PHY node (because it's not clear which PHY is used on that board).
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2 |
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#
890265c9 |
| 11-May-2019 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
arm64: dts: amlogic: remove ethernet-phy-idAAAA.BBBB compatible strings
The Ethernet PHY documentation (Documentation/devicetree/bindings/net/phy.txt) states that: If the PHY reports an incorrect
arm64: dts: amlogic: remove ethernet-phy-idAAAA.BBBB compatible strings
The Ethernet PHY documentation (Documentation/devicetree/bindings/net/phy.txt) states that: If the PHY reports an incorrect ID (or none at all) then the "compatible" list may contain an entry with the correct PHY ID in the form: "ethernet-phy-idAAAA.BBBB"
An older version of the documentation suggested that the compatible string can be used when the PHY ID is known.
Remove the ethernet-phy-id compatible string and add a comment with the PHY ID instead. This is a no-op on boards which are shipped with the PHY that was listed (= all known cases). However, if a board manufacturer decides to ship a different PHY we will now load and use the correct driver because we ask the PHY to identify itself.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3 |
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#
1b2b1e75 |
| 23-Jun-2018 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson-gx-p23x-q20x: move the wifi node to each board's .dts
meson-gx-p23x-q20x.dtsi is currently used by five boards: - Amlogic P230 and P231 (which should be identical, apart from the
ARM64: dts: meson-gx-p23x-q20x: move the wifi node to each board's .dts
meson-gx-p23x-q20x.dtsi is currently used by five boards: - Amlogic P230 and P231 (which should be identical, apart from the external RGMII PHY on P230 whereas P231 can only use the internal PHY) - Amlogic Q200 (identical to P230 but with an S912 GXM SoC instead of a GXL S905D SoC) and Q201 (identical to P231 but with an S912 GXM SoC instead of a GXL S905D SoC) - NEXBOX A1 (based on the S912 GXM SoC)
The Amlogic P230 board uses a Broadcom BCM4356 SDIO wifi chip. Since the other Amlogic reference design boards are very similar it's safe to assume that these also use a Broadcom based SDIO wifi chip (which is also how it was configured in meson-gx-p23x-q20x.dtsi).
However, NEXBOX A1 comes with a "longsys LTM8830" SDIO wifi module, which is based on the "Qualcomm Atheros QCA9377-3(QCA1023-0)" chipset.
Thus move the wifi node from meson-gx-p23x-q20x.dtsi to each of the four Amlogic reference board's .dts files. There are no devicetree bindings for the QCA9377 SDIO wifi module yet, so nothing is added to meson-gxm-nexbox-a1.dts.
Fixes: f51b454549b812 ("ARM64: dts: meson-gxm: Add support for the Nexbox A1") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
41ed2e0d |
| 23-Jun-2018 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson: enable the saradc node in meson-gx-p23x-q20x.dtsi
meson-gxl-s905d-p230.dts and meson-gxm-q200.dts enable the saradc node (and configure it's vref-supply "VDDIO_AO18") in their cor
ARM64: dts: meson: enable the saradc node in meson-gx-p23x-q20x.dtsi
meson-gxl-s905d-p230.dts and meson-gxm-q200.dts enable the saradc node (and configure it's vref-supply "VDDIO_AO18") in their corresponding .dts file. Move both (the saradc node as well as the VDDIO_AO18 regulator) to remove some duplicate code.
As a positive side-effect this enables the saradc also for the P231 (GXL S905D) and Q201 (GXM S912) development boards which are similar to the P230/Q200 boards (P231 and Q201 use the internal 100Mbit/s PHY, while P230 and Q200 have an external RGMII PHY).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.17.2, v4.17.1, v4.17, v4.16 |
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#
114abfe1 |
| 27-Feb-2018 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: amlogic: Convert to new-style SPDX license identifiers
Move the SPDX-License-Identifier lines to the top and drop the license splat.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.c
ARM64: dts: amlogic: Convert to new-style SPDX license identifiers
Move the SPDX-License-Identifier lines to the top and drop the license splat.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.15 |
|
#
3106507e |
| 04-Dec-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gxm: fix q200 interrupt number
Correct the interrupt number assigned to the Realtek PHY in the q200
Fixes: b94d22d94ad2 ("ARM64: dts: meson-gx: add external PHY interrupt on some
ARM64: dts: meson-gxm: fix q200 interrupt number
Correct the interrupt number assigned to the Realtek PHY in the q200
Fixes: b94d22d94ad2 ("ARM64: dts: meson-gx: add external PHY interrupt on some platforms") Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
50290cfe |
| 02-Dec-2017 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson: add comments with the GPIO for the PHY interrupts
Currently one has to look/calculate the GPIO for the PHY interrupts manually. Add a comment for the existing PHY interrupt lines
ARM64: dts: meson: add comments with the GPIO for the PHY interrupts
Currently one has to look/calculate the GPIO for the PHY interrupts manually. Add a comment for the existing PHY interrupt lines to make it easier to find out which GPIO is used. This is done using the following calculation: - number of GPIO AO pins (14 on GXBB: GPIOAO_0..13) - add the offset of the pin which is used for the interrupt (for example GPIOZ_15 = 15 on Odroid-C2)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-By: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.13.16, v4.14 |
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#
b94d22d9 |
| 19-Oct-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gx: add external PHY interrupt on some platforms
Add the external PHY interrupt on the nanopi-k2, odroid-c2, p200, p230 and q200
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com
ARM64: dts: meson-gx: add external PHY interrupt on some platforms
Add the external PHY interrupt on the nanopi-k2, odroid-c2, p200, p230 and q200
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.13.5, v4.13, v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2 |
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#
82838e6f |
| 07-Mar-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Add Buttons to Q200 and P230 boards
This patch adds support for the P230 and Q200 ADC laddered button and GPIO button.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
ARM64: dts: meson-gx: Add Buttons to Q200 and P230 boards
This patch adds support for the P230 and Q200 ADC laddered button and GPIO button.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.10.1, v4.10 |
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#
093d23db |
| 19-Feb-2017 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: amlogic: add the ethernet TX delay configuration
This adds the amlogic,tx-delay-ns property with the old (hardcoded) default value of 2ns to all boards which are using an RGMII ethernet
ARM64: dts: amlogic: add the ethernet TX delay configuration
This adds the amlogic,tx-delay-ns property with the old (hardcoded) default value of 2ns to all boards which are using an RGMII ethernet PHY.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
4e611897 |
| 19-Jan-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
In order to keep consistency naming with the Nexbox A1 DTS file, remove the S912 SoC name in the GXM DT files.
Suggested-by: And
ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
In order to keep consistency naming with the Nexbox A1 DTS file, remove the S912 SoC name in the GXM DT files.
Suggested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
46b7f224 |
| 07-Dec-2020 |
Stefan Agner <stefan@agner.ch> |
arm64: dts: meson: fix PHY deassert timing requirements [ Upstream commit c183c406c4321002fe85b345b51bc1a3a04b6d33 ] According to the datasheet (Rev. 1.9) the RTL8211F requires at l
arm64: dts: meson: fix PHY deassert timing requirements [ Upstream commit c183c406c4321002fe85b345b51bc1a3a04b6d33 ] According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY registers. This fixes an issue seen on ODROID-C2 where the Ethernet link doesn't come up when using ip link set down/up: [ 6630.714855] meson8b-dwmac c9410000.ethernet eth0: Link is Down [ 6630.785775] meson8b-dwmac c9410000.ethernet eth0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=36) [ 6630.893071] meson8b-dwmac c9410000.ethernet: Failed to reset the dma [ 6630.893800] meson8b-dwmac c9410000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 6630.902835] meson8b-dwmac c9410000.ethernet eth0: stmmac_open: Hw setup failed Fixes: f29cabf240ed ("arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/4a322c198b86e4c8b3dda015560a683babea4d63.1607363522.git.stefan@agner.ch Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11 |
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#
f29cabf2 |
| 15-Jun-2019 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings. Replace s
arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings The snps,reset-gpio bindings are deprecated in favour of the generic "Ethernet PHY reset" bindings. Replace snps,reset-gpio from the ðmac node with reset-gpios in the ethernet-phy node. The old snps,reset-active-low property is now encoded directly as GPIO flag inside the reset-gpios property. snps,reset-delays-us is converted to reset-assert-us and reset-deassert-us. reset-assert-us is the second cell from snps,reset-delays-us while reset-deassert-us was the third cell. Instead of blindly copying the old values (which seems strange since they gave the PHY one second to come out of reset) over this also updates the delays based on the datasheets: - the Realtek RTL8211F PHY needs a 10ms assert delay (the datasheet mentions: "For a complete PHY reset, this pin must be asserted low for at least 10ms") and a 30ms deassert delay (the datasheet mentions: "Wait for a further 30ms (for internal circuits settling time) before accessing the PHY register". This applies to the following boards: GXBB NanoPi K2, GXBB Odroid-C2, GXBB Vega S95 variants, GXBB Wetek variants, GXL P230, GXM Khadas VIM2, GXM Nexbox A1, GXM Q200, GXM RBox Pro boards. - the ICPlus IP101GR PHY needs a 10ms assert delay (the datasheet mentions: "Trst | Reset period | 10ms") and a deassert delay of 10ms as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock output ready after reset released | 10ms"). This applies to the GXBB Nexbox A95X board. - the Micrel KSZ9031 seems to require a 100us delay but use the same (seemingly safe) values from RTL8211F due to lack of a board to verify this. This applies to the GXBB P200 board. The GXBB P201 board is left out from this conversion because it doesn't have a dedicated PHY node (because it's not clear which PHY is used on that board). Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2 |
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#
890265c9 |
| 11-May-2019 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
arm64: dts: amlogic: remove ethernet-phy-idAAAA.BBBB compatible strings The Ethernet PHY documentation (Documentation/devicetree/bindings/net/phy.txt) states that: If the PHY repor
arm64: dts: amlogic: remove ethernet-phy-idAAAA.BBBB compatible strings The Ethernet PHY documentation (Documentation/devicetree/bindings/net/phy.txt) states that: If the PHY reports an incorrect ID (or none at all) then the "compatible" list may contain an entry with the correct PHY ID in the form: "ethernet-phy-idAAAA.BBBB" An older version of the documentation suggested that the compatible string can be used when the PHY ID is known. Remove the ethernet-phy-id compatible string and add a comment with the PHY ID instead. This is a no-op on boards which are shipped with the PHY that was listed (= all known cases). However, if a board manufacturer decides to ship a different PHY we will now load and use the correct driver because we ask the PHY to identify itself. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3 |
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#
1b2b1e75 |
| 23-Jun-2018 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson-gx-p23x-q20x: move the wifi node to each board's .dts meson-gx-p23x-q20x.dtsi is currently used by five boards: - Amlogic P230 and P231 (which should be identical, apar
ARM64: dts: meson-gx-p23x-q20x: move the wifi node to each board's .dts meson-gx-p23x-q20x.dtsi is currently used by five boards: - Amlogic P230 and P231 (which should be identical, apart from the external RGMII PHY on P230 whereas P231 can only use the internal PHY) - Amlogic Q200 (identical to P230 but with an S912 GXM SoC instead of a GXL S905D SoC) and Q201 (identical to P231 but with an S912 GXM SoC instead of a GXL S905D SoC) - NEXBOX A1 (based on the S912 GXM SoC) The Amlogic P230 board uses a Broadcom BCM4356 SDIO wifi chip. Since the other Amlogic reference design boards are very similar it's safe to assume that these also use a Broadcom based SDIO wifi chip (which is also how it was configured in meson-gx-p23x-q20x.dtsi). However, NEXBOX A1 comes with a "longsys LTM8830" SDIO wifi module, which is based on the "Qualcomm Atheros QCA9377-3(QCA1023-0)" chipset. Thus move the wifi node from meson-gx-p23x-q20x.dtsi to each of the four Amlogic reference board's .dts files. There are no devicetree bindings for the QCA9377 SDIO wifi module yet, so nothing is added to meson-gxm-nexbox-a1.dts. Fixes: f51b454549b812 ("ARM64: dts: meson-gxm: Add support for the Nexbox A1") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
41ed2e0d |
| 23-Jun-2018 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson: enable the saradc node in meson-gx-p23x-q20x.dtsi meson-gxl-s905d-p230.dts and meson-gxm-q200.dts enable the saradc node (and configure it's vref-supply "VDDIO_AO18")
ARM64: dts: meson: enable the saradc node in meson-gx-p23x-q20x.dtsi meson-gxl-s905d-p230.dts and meson-gxm-q200.dts enable the saradc node (and configure it's vref-supply "VDDIO_AO18") in their corresponding .dts file. Move both (the saradc node as well as the VDDIO_AO18 regulator) to remove some duplicate code. As a positive side-effect this enables the saradc also for the P231 (GXL S905D) and Q201 (GXM S912) development boards which are similar to the P230/Q200 boards (P231 and Q201 use the internal 100Mbit/s PHY, while P230 and Q200 have an external RGMII PHY). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.17.2, v4.17.1, v4.17, v4.16 |
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#
114abfe1 |
| 27-Feb-2018 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: amlogic: Convert to new-style SPDX license identifiers Move the SPDX-License-Identifier lines to the top and drop the license splat. Signed-off-by: Neil Armstrong <n
ARM64: dts: amlogic: Convert to new-style SPDX license identifiers Move the SPDX-License-Identifier lines to the top and drop the license splat. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.15 |
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#
3106507e |
| 04-Dec-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gxm: fix q200 interrupt number Correct the interrupt number assigned to the Realtek PHY in the q200 Fixes: b94d22d94ad2 ("ARM64: dts: meson-gx: add external PHY in
ARM64: dts: meson-gxm: fix q200 interrupt number Correct the interrupt number assigned to the Realtek PHY in the q200 Fixes: b94d22d94ad2 ("ARM64: dts: meson-gx: add external PHY interrupt on some platforms") Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
50290cfe |
| 02-Dec-2017 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: meson: add comments with the GPIO for the PHY interrupts Currently one has to look/calculate the GPIO for the PHY interrupts manually. Add a comment for the existing PHY inte
ARM64: dts: meson: add comments with the GPIO for the PHY interrupts Currently one has to look/calculate the GPIO for the PHY interrupts manually. Add a comment for the existing PHY interrupt lines to make it easier to find out which GPIO is used. This is done using the following calculation: - number of GPIO AO pins (14 on GXBB: GPIOAO_0..13) - add the offset of the pin which is used for the interrupt (for example GPIOZ_15 = 15 on Odroid-C2) Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-By: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.13.16, v4.14 |
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#
b94d22d9 |
| 19-Oct-2017 |
Jerome Brunet <jbrunet@baylibre.com> |
ARM64: dts: meson-gx: add external PHY interrupt on some platforms Add the external PHY interrupt on the nanopi-k2, odroid-c2, p200, p230 and q200 Signed-off-by: Jerome Brunet <
ARM64: dts: meson-gx: add external PHY interrupt on some platforms Add the external PHY interrupt on the nanopi-k2, odroid-c2, p200, p230 and q200 Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.13.5, v4.13, v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2 |
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#
82838e6f |
| 07-Mar-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
ARM64: dts: meson-gx: Add Buttons to Q200 and P230 boards This patch adds support for the P230 and Q200 ADC laddered button and GPIO button. Signed-off-by: Neil Armstrong <narms
ARM64: dts: meson-gx: Add Buttons to Q200 and P230 boards This patch adds support for the P230 and Q200 ADC laddered button and GPIO button. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.10.1, v4.10 |
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#
093d23db |
| 19-Feb-2017 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
ARM64: dts: amlogic: add the ethernet TX delay configuration This adds the amlogic,tx-delay-ns property with the old (hardcoded) default value of 2ns to all boards which are using an RGM
ARM64: dts: amlogic: add the ethernet TX delay configuration This adds the amlogic,tx-delay-ns property with the old (hardcoded) default value of 2ns to all boards which are using an RGMII ethernet PHY. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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