#
964d0fbf |
| 06-Jul-2018 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Allow to create BO lists in CS ioctl v3 This change is to support MESA performace optimization. Modify CS IOCTL to allow its input as command buffer and an array of buffe
drm/amdgpu: Allow to create BO lists in CS ioctl v3 This change is to support MESA performace optimization. Modify CS IOCTL to allow its input as command buffer and an array of buffer handles to create a temporay bo list and then destroy it when IOCTL completes. This saves on calling for BO_LIST create and destry IOCTLs in MESA and by this improves performance. v2: Avoid inserting the temp list into idr struct. v3: Remove idr alloation from amdgpu_bo_list_create. Remove useless argument from amdgpu_cs_parser_fini Minor cosmetic stuff. v4: Revert amdgpu_bo_list_destroy back to static Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
81d35014 |
| 01-May-2018 |
Boyuan Zhang <boyuan.zhang@amd.com> |
uapi/drm: add AMDGPU_HW_IP_VCN_JPEG for jpeg CS Add AMDGPU_HW_IP_VCN_JPEG define for jpeg CS Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <chr
uapi/drm: add AMDGPU_HW_IP_VCN_JPEG for jpeg CS Add AMDGPU_HW_IP_VCN_JPEG define for jpeg CS Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b646c1dc |
| 24-May-2018 |
Samuel Li <Samuel.Li@amd.com> |
drm/amdgpu: add kernel doc for memory domains. Document the GEM domains exposed to userspace. Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Sa
drm/amdgpu: add kernel doc for memory domains. Document the GEM domains exposed to userspace. Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
959a2091 |
| 14-May-2018 |
Yong Zhao <yong.zhao@amd.com> |
drm/amdgpu: Add support to change mtype for 2nd part of gart BOs on GFX9 This change prepares for a workaround in amdkfd for a GFX9 HW bug. It requires the control stack memory of comput
drm/amdgpu: Add support to change mtype for 2nd part of gart BOs on GFX9 This change prepares for a workaround in amdkfd for a GFX9 HW bug. It requires the control stack memory of compute queues, which is allocated from the second page of MQD gart BOs, to have mtype NC, rather than the default UC. Signed-off-by: Yong Zhao <yong.zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
621a6318 |
| 22-Jan-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add save restore list cntl gpm and srm firmware support RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang
drm/amdgpu: add save restore list cntl gpm and srm firmware support RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d240cd9e |
| 03-Apr-2018 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and do
drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense when draw calls from two adjacent gfx IBs run in parallel. This will be the new default for Mesa. v2: bump the version Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3f188453 |
| 17-Apr-2018 |
Chunming Zhou <david1.zhou@amd.com> |
drm/amdgpu: handle domain mask checking v2 if domain is illegal, we should return error. v2: remove duplicated domain checking. Signed-off-by: Chunming Zhou <david1.zhou@a
drm/amdgpu: handle domain mask checking v2 if domain is illegal, we should return error. v2: remove duplicated domain checking. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1afd30ef |
| 10-Apr-2018 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: revert "add new bo flag that indicates BOs don't need fallback (v2)" This reverts commit 6f51d28bfe8e1a676de5cd877639245bed3cc818. Makes fallback handling to complicated
drm/amdgpu: revert "add new bo flag that indicates BOs don't need fallback (v2)" This reverts commit 6f51d28bfe8e1a676de5cd877639245bed3cc818. Makes fallback handling to complicated. This is just a feature for the GEM interface and shouldn't leak into the core BO create function. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
552825b2 |
| 01-Apr-2018 |
Chunming Zhou <david1.zhou@amd.com> |
drm/amdgpu: add new bo flag that indicates BOs don't need fallback (v2) user cases: 1. KFD wraps amdgpu_bo_create, they have no fallback case which is different with amdgpu_gem_objec
drm/amdgpu: add new bo flag that indicates BOs don't need fallback (v2) user cases: 1. KFD wraps amdgpu_bo_create, they have no fallback case which is different with amdgpu_gem_object_create. since upstream branch has no amdgpu_amdkfd_gpuvm.c, which need KFD guys add this flag to __alloc_memory_of_gpu: + flags |= AMDGPU_GEM_CREATE_NO_FALLBACK; 2. UMD can specify this flag for their allocation as well if they like. v2: squash in merge conflict fix (Chunming) Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Cc: felix.kuehling@amd.com Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3ac952b1 |
| 16-Mar-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add VCN to firmware query interface Need to be able to query the VCN firmware version from userspace to determine supported features, etc. Reviewed-by: Huang Rui <ra
drm/amdgpu: add VCN to firmware query interface Need to be able to query the VCN firmware version from userspace to determine supported features, etc. Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1e09b053 |
| 08-Mar-2018 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: query vram type from atombios The vram type for dGPU is stored in umc_info while sys mem type for APU is stored in integratedsysteminfo Signed-off-by: Hawking Zhang
drm/amdgpu: query vram type from atombios The vram type for dGPU is stored in umc_info while sys mem type for APU is stored in integratedsysteminfo Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
60bbade2 |
| 16-Jan-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Expose more GPU sensor queries Add sub-queries for stable pstate shader/memory clock. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <R
drm/amdgpu: Expose more GPU sensor queries Add sub-queries for stable pstate shader/memory clock. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5b565e0e |
| 07-Nov-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: expose the VA above the hole to userspace Let userspace know how much area we have above the 48bit VA hole on Vega10. Signed-off-by: Christian König <christian.koeni
drm/amdgpu: expose the VA above the hole to userspace Let userspace know how much area we have above the 48bit VA hole on Vega10. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bc1b1bf6 |
| 17-Oct-2017 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu:implement ctx query2 this query will give flag bits to indicate what happend on the given context Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christia
drm/amdgpu:implement ctx query2 this query will give flag bits to indicate what happend on the given context Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
56e0349f |
| 19-Oct-2017 |
Dave Airlie <airlied@redhat.com> |
amdgpu: add padding to the fence to handle ioctl. I don't think this ioctl is in a Linus release yet. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher
amdgpu: add padding to the fence to handle ioctl. I don't think this ioctl is in a Linus release yet. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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#
1f7251b7 |
| 09-Oct-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add VRAM lost query Allows userspace to figure out if VRAM was lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.h
drm/amdgpu: add VRAM lost query Allows userspace to figure out if VRAM was lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8bc4c256 |
| 13-Oct-2017 |
Andres Rodriguez <andresx7@gmail.com> |
drm/amdgpu: rename context priority levels Don't leak implementation details about how each priority behaves to usermode. This allows greater flexibility in the future. Squash i
drm/amdgpu: rename context priority levels Don't leak implementation details about how each priority behaves to usermode. This allows greater flexibility in the future. Squash into c2636dc53abd8269a0930bccd564f2f195dba729 Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v4.12 |
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#
52c6a62c |
| 26-Jun-2017 |
Andres Rodriguez <andresx7@gmail.com> |
drm/amdgpu: add interface for editing a foreign process's priority v3 The AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE ioctls are used to set the priority of a different process in the curr
drm/amdgpu: add interface for editing a foreign process's priority v3 The AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE ioctls are used to set the priority of a different process in the current system. When a request is dropped, the process's contexts will be restored to the priority specified at context creation time. A request can be dropped by setting the override priority to AMDGPU_CTX_PRIORITY_UNSET. An fd is used to identify the remote process. This is simpler than passing a pid number, which is vulnerable to re-use, etc. This functionality is limited to DRM_MASTER since abuse of this interface can have a negative impact on the system's performance. v2: removed unused output structure v3: change refcounted interface for a regular set operation Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f3d19bf8 |
| 26-Jun-2017 |
Andres Rodriguez <andresx7@gmail.com> |
drm/amdgpu: introduce AMDGPU_CTX_PRIORITY_UNSET Use _INVALID to identify bad parameters and _UNSET to represent the lack of interest in a specific value. Signed-off-by: Andres R
drm/amdgpu: introduce AMDGPU_CTX_PRIORITY_UNSET Use _INVALID to identify bad parameters and _UNSET to represent the lack of interest in a specific value. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10 |
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#
c2636dc5 |
| 22-Dec-2016 |
Andres Rodriguez <andresx7@gmail.com> |
drm/amdgpu: add parameter to allocate high priority contexts v11 Add a new context creation parameter to express a global context priority. The priority ranking in descending order
drm/amdgpu: add parameter to allocate high priority contexts v11 Add a new context creation parameter to express a global context priority. The priority ranking in descending order is as follows: * AMDGPU_CTX_PRIORITY_HIGH_HW * AMDGPU_CTX_PRIORITY_HIGH_SW * AMDGPU_CTX_PRIORITY_NORMAL * AMDGPU_CTX_PRIORITY_LOW_SW * AMDGPU_CTX_PRIORITY_LOW_HW The driver will attempt to schedule work to the hardware according to the priorities. No latency or throughput guarantees are provided by this patch. This interface intends to service the EGL_IMG_context_priority extension, and vulkan equivalents. Setting a priority above NORMAL requires CAP_SYS_NICE or DRM_MASTER. v2: Instead of using flags, repurpose __pad v3: Swap enum values of _NORMAL _HIGH for backwards compatibility v4: Validate usermode priority and store it v5: Move priority validation into amdgpu_ctx_ioctl(), headline reword v6: add UAPI note regarding priorities requiring CAP_SYS_ADMIN v7: remove ctx->priority v8: added AMDGPU_CTX_PRIORITY_LOW, s/CAP_SYS_ADMIN/CAP_SYS_NICE v9: change the priority parameter to __s32 v10: split priorities into _SW and _HW v11: Allow DRM_MASTER without CAP_SYS_NICE Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
177ae09b |
| 15-Sep-2017 |
Andres Rodriguez <andresx7@gmail.com> |
drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2 Introduce a flag to signal that access to a BO will be synchronized through an external mechanism. Currently all buffers
drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2 Introduce a flag to signal that access to a BO will be synchronized through an external mechanism. Currently all buffers shared between contexts are subject to implicit synchronization. However, this is only required for protocols that currently don't support an explicit synchronization mechanism (DRI2/3). This patch introduces the AMDGPU_GEM_CREATE_EXPLICIT_SYNC, so that users can specify when it is safe to disable implicit sync. v2: only disable explicit sync in amdgpu_cs_ioctl Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7ca24cf2 |
| 12-Sep-2017 |
Marek Olšák <marek.olsak@amd.com> |
drm/amdgpu: add FENCE_TO_HANDLE ioctl that returns syncobj or sync_file for being able to convert an amdgpu fence into one of the handles. Mesa will use this. Reviewed-by: Dave
drm/amdgpu: add FENCE_TO_HANDLE ioctl that returns syncobj or sync_file for being able to convert an amdgpu fence into one of the handles. Mesa will use this. Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e1eb899b4 |
| 25-Aug-2017 |
Christian König <christian.koenig@amd.com> |
drm/amdgpu: add IOCTL interface for per VM BOs v3 Add the IOCTL interface so that applications can allocate per VM BOs. Still WIP since not all corner cases are tested yet, but this
drm/amdgpu: add IOCTL interface for per VM BOs v3 Add the IOCTL interface so that applications can allocate per VM BOs. Still WIP since not all corner cases are tested yet, but this reduces average CS overhead for 10K BOs from 21ms down to 48us. v2: add some extra checks, remove the WIP tag v3: rename new flag to AMDGPU_GEM_CREATE_VM_ALWAYS_VALID Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
dbfe85ea |
| 19-Jun-2017 |
Flora Cui <Flora.Cui@amd.com> |
drm/amdgpu: Fix the exported always on CU bitmap Newer asics with 4 SEs are not able to fit the entire bitmask in the original field, use an array instead. v2: keep cu_ao_mask f
drm/amdgpu: Fix the exported always on CU bitmap Newer asics with 4 SEs are not able to fit the entire bitmask in the original field, use an array instead. v2: keep cu_ao_mask for backward compatibility. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
660e8558 |
| 13-Mar-2017 |
Dave Airlie <airlied@redhat.com> |
amdgpu: use drm sync objects for shared semaphores (v6) This creates a new command submission chunk for amdgpu to add in and out sync objects around the submission. Sync objects
amdgpu: use drm sync objects for shared semaphores (v6) This creates a new command submission chunk for amdgpu to add in and out sync objects around the submission. Sync objects are managed via the drm syncobj ioctls. The command submission interface is enhanced with two new chunks, one for syncobj pre submission dependencies, and one for post submission sync obj signalling, and just takes a list of handles for each. This is based on work originally done by David Zhou at AMD, with input from Christian Konig on what things should look like. In theory VkFences could be backed with sync objects and just get passed into the cs as syncobj handles as well. NOTE: this interface addition needs a version bump to expose it to userspace. TODO: update to dep_sync when rebasing onto amdgpu master. (with this - r-b from Christian) v1.1: keep file reference on import. v2: move to using syncobjs v2.1: change some APIs to just use p pointer. v3: make more robust against CS failures, we now add the wait sems but only remove them once the CS job has been submitted. v4: rewrite names of API and base on new syncobj code. v5: move post deps earlier, rename some apis v6: lookup post deps earlier, and just replace fences in post deps stage (Christian) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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