Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72 |
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#
41155b6f |
| 03-Oct-2022 |
Jon Hunter <jonathanh@nvidia.com> |
dt-bindings: tegra: Update headers for Tegra234
Update the device-tree clock, memory, power and reset headers for Tegra234 by adding the definitions for all the various devices.
Signed-off-by: Jon
dt-bindings: tegra: Update headers for Tegra234
Update the device-tree clock, memory, power and reset headers for Tegra234 by adding the definitions for all the various devices.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v6.0, v5.15.71, v5.15.70, v5.15.69 |
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#
0e2b014e |
| 20-Sep-2022 |
Mikko Perttunen <mperttunen@nvidia.com> |
dt-bindings: Add headers for NVDEC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers necessary for NVDEC.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked
dt-bindings: Add headers for NVDEC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers necessary for NVDEC.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51 |
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#
63a6ef23 |
| 27-Jun-2022 |
Mikko Perttunen <mperttunen@nvidia.com> |
dt-bindings: Add headers for Host1x and VIC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers for Host1x and VIC on Tegra234.
Signed-off-by: Mikko Perttunen <mperttun
dt-bindings: Add headers for Host1x and VIC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers for Host1x and VIC on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
5de7d31b |
| 05-Jul-2022 |
Thierry Reding <treding@nvidia.com> |
dt-bindings: power: Add Tegra234 MGBE power domains
Add power domain IDs for the four MGBE power partitions found on Tegra234.
Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bhad
dt-bindings: power: Add Tegra234 MGBE power domains
Add power domain IDs for the four MGBE power partitions found on Tegra234.
Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21 |
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#
6460278f |
| 05-Feb-2022 |
Vidya Sagar <vidyas@nvidia.com> |
dt-bindings: power: Add Tegra234 PCIe power domains
Add power domain IDs for the four PCIe power partitions found on Tegra234.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Acked-by: Rob Herring <
dt-bindings: power: Add Tegra234 PCIe power domains
Add power domain IDs for the four PCIe power partitions found on Tegra234.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
07d74390 |
| 16-Feb-2022 |
Mohan Kumar <mkumard@nvidia.com> |
dt-bindings: Add HDA support for Tegra234
Add hda clocks, memory ,power and reset binding entries for Tegra234.
Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Signed-off-by: Thierry Reding <tredin
dt-bindings: Add HDA support for Tegra234
Add hda clocks, memory ,power and reset binding entries for Tegra234.
Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Revision tags: v5.15.20, v5.15.19, v5.15.18, v5.15.17 |
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#
40efe139 |
| 27-Jan-2022 |
Sameer Pujar <spujar@nvidia.com> |
dt-bindings: Add Tegra234 APE support
Add clocks, power-domain and memory bindings to support APE subsystem on Tegra234.
Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Redin
dt-bindings: Add Tegra234 APE support
Add clocks, power-domain and memory bindings to support APE subsystem on Tegra234.
Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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